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McBSP Register Manual
Table 21-93. Register Call Summary for Register MCBSPLP_XCERF_REG
McBSP Functional Description
•
McBSP Register Manual
•
McBSP Register Mapping Summary
:
Table 21-94. MCBSPLP_RCERG_REG
Address Offset
0x0000 006C
Physical Address
0x4807 406C
Instance
McBSP1
0x4809 606C
McBSP5
0x4902 206C
McBSP2
0x4902 406C
McBSP3
0x4902 606C
McBSP4
Description
McBSPLP receive channel enable register partition G
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
RCERG
Bits
Field Name
Description
Type
Reset
31:16
RESERVED
Read returns 0x0.
R
0x0000
15:0
RCERG
Receive Channel Enable
RW
0x0000
RCERG n=0 Disables reception of n-th channel in an
even-numbered block in partition G
RCERG n=1 Enables reception of n-th channel in an
even-numbered block in partition G
Table 21-95. Register Call Summary for Register MCBSPLP_RCERG_REG
McBSP Functional Description
•
McBSP Register Manual
•
McBSP Register Mapping Summary
:
Table 21-96. MCBSPLP_RCERH_REG
Address Offset
0x0000 0070
Physical Address
0x4807 4070
Instance
McBSP1
0x4809 6070
McBSP5
0x4902 2070
McBSP2
0x4902 4070
McBSP3
0x4902 6070
McBSP4
Description
McBSPLP receive channel enable register partition H
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
RCERH
3185
SWPU177N – December 2009 – Revised November 2010
Multi-Channel Buffered Serial Port
Copyright © 2009–2010, Texas Instruments Incorporated