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McBSP Register Manual
Table 21-108. MCBSPLP_ROVFLCLR_REG
Address Offset
0x0000 0088
Physical Address
0x4807 4088
Instance
McBSP1
0x4809 6088
McBSP5
0x4902 2088
McBSP2
0x4902 4088
McBSP3
0x4902 6088
McBSP4
Description
McBSPLP receive overflow interrupt clear
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
ROVFLCLR
Bits
Field Name
Description
Type
Reset
31:0
ROVFLCLR
Read from this register will clear the IRQ generated by
RW
0x00000000
the receive overflow condition.
Write to this register has no effect.
((legacy)
Table 21-109. Register Call Summary for Register MCBSPLP_ROVFLCLR_REG
McBSP Register Manual
•
McBSP Register Mapping Summary
:
3189
SWPU177N – December 2009 – Revised November 2010
Multi-Channel Buffered Serial Port
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