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High Byte
Low Byte
Address-Word - Register Operation
Register
Memory
Operation
Register
Unused
2
19 16 15
0
8 7
Addressing Modes
Figure 4-14. Address-Word – Register Operation
4.4
Addressing Modes
Seven addressing modes for the source operand and four addressing modes for the destination operand
use 16-bit or 20-bit addresses (see
). The MSP430 and MSP430X instructions are usable
throughout the entire 1MB memory range.
Table 4-3. Source and Destination Addressing
As, Ad Addressing Mode
Syntax
Description
00, 0
Register
Rn
Register contents are operand.
01, 1
Indexed
X(Rn)
(Rn + X) points to the operand. X is stored in the next word, or stored in combination of
the preceding extension word and the next word.
01, 1
Symbolic
ADDR
(PC + X) points to the operand. X is stored in the next word, or stored in combination of
the preceding extension word and the next word. Indexed mode X(PC) is used.
01, 1
Absolute
&ADDR
The word following the instruction contains the absolute address. X is stored in the next
word, or stored in combination of the preceding extension word and the next word.
Indexed mode X(SR) is used.
10, –
Indirect Register
@Rn
Rn is used as a pointer to the operand.
11, –
Indirect
@Rn+
Rn is used as a pointer to the operand. Rn is incremented afterwards by 1 for .B
Autoincrement
instructions, by 2 for .W instructions, and by 4 for .A instructions.
11, –
Immediate
#N
N is stored in the next word, or stored in combination of the preceding extension word
and the next word. Indirect autoincrement mode @PC+ is used.
The seven addressing modes are explained in detail in the following sections. Most of the examples show
the same addressing mode for the source and destination, but any valid combination of source and
destination addressing modes is possible in an instruction.
NOTE:
Use of Labels EDE, TONI, TOM, and LEO
Throughout MSP430 documentation, EDE, TONI, TOM, and LEO are used as generic labels.
They are only labels and have no special meaning.
97
SLAU272C – May 2011 – Revised November 2013
CPUX
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