![background image](http://html.mh-extra.com/html/texas-instruments/lmk05028/lmk05028_advance-information_1097089004.webp)
ADV
ANCEINFORMA
TION
6
4
H
W
_
SW
_
C
T
R
L
1
7
IN
SEL
0
_
1
1
IN0_P
48
CAP_APLL1
6
3
VD
D
O
_
7
1
8
T
C
XO
_
IN
2
IN0_N
47
LF1
6
2
O
U
T
7
_
P
1
9
VD
D_
T
C
XO
3
VDD_IN0
46
PDN
6
1
O
U
T
7
_
N
2
0
IN
SEL
0
_
0
4
VDD_IN3
45
GPIO0/SYNCN
6
0
G
PI
O
2
/SD
O
2
1
VD
D
O
_
0
5
IN3_P
44
XO_N
5
9
VD
D
O
_
6
2
2
O
U
T
0
_
P
6
IN3_N
43
XO_P
5
8
O
U
T
6
_
N
2
3
O
U
T
0
_
N
7
CAP_DIG
42
VDD_XO
5
7
O
U
T
6
_
P
2
4
G
PI
O1
/SC
S
8
VDD_DIG
41
GPIO4/FDEC1
5
6
ST
AT
U
S
1
2
5
VD
D
O
_
1
9
VDD_IN2
40
GPIO3/FINC1
5
5
ST
AT
U
S
0
2
6
O
U
T
1
_
N
10
IN2_P
39
LF2
5
4
O
U
T
5
_
P
2
7
O
U
T
1
_
P
11
IN2_N
38
CAP_APLL2
5
3
O
U
T
5
_
N
2
8
IN
SEL
1
_
0
12
GPIO5/FINC2
37
VDD_APLL2
5
2
O
U
T
4
_
N
2
9
IN
SEL
1
_
1
13
GPIO6/FDEC2
36
SCL/SCK
5
1
O
U
T
4
_
P
3
0
VD
D
O
_
2
3
14
IN1_P
35
SDA/SDI
5
0
VD
D
O
_
4
5
3
1
O
U
T
2
_
P
15
IN1_N
34
OUT3_P
4
9
VD
D_
APL
L
1
3
2
O
U
T
2
_
N
16
VDD_IN1
33
OUT3_N
Not to scale
GND
4
SNAS724 – FEBRUARY 2018
Product Folder Links:
Copyright © 2018, Texas Instruments Incorporated
(1)
G = Ground, P = Power, I = Input, O = Output, I/O = Input or Output, A = Analog.
6 Pin Configuration and Functions
RGC Package
64-Pin VQFN
Top View
Pin Functions
PIN
TYPE
(1)
DESCRIPTION
NAME
NO.
POWER
GND
PAD
G
Ground / Thermal Pad.
The exposed pad must be connected to PCB ground for proper electrical and thermal performance.
A 7x7 via pattern is recommended to connect the IC ground pad to the PCB ground layers.
VDD_IN0
3
P
Core Supply (3.3 V) for Reference Inputs 0 to 3.
Place a nearby 0.1-µF bypass capacitor on each pin.
VDD_IN1
16
P
VDD_IN2
9
P
VDD_IN3
4
P
Summary of Contents for LMK05028
Page 57: ......