ADV
ANCEINFORMA
TION
CML
Driver
CML
LMK05028
Copyright © 2018, Texas Instruments Incorporated
LVDS Driver
LVDS
LMK05028
100
Copyright © 2018, Texas Instruments Incorporated
LVPECL Driver
LVPECL
50
50
LMK05028
VDD_IN - 2
Copyright © 2018, Texas Instruments Incorporated
3.3V LVCMOS
Driver
LVCMOS
LMK05028
Rs
Copyright © 2018, Texas Instruments Incorporated
23
SNAS724 – FEBRUARY 2018
Product Folder Links:
Copyright © 2018, Texas Instruments Incorporated
Feature Description (continued)
Table 3. Input Buffer Configurations for Reference and XO Inputs
MODE
INTERNAL COUPLING
TERMINATION
HCSL
AC
Internal (50
Ω
)
LVDS (DC-coupled)
AC
Internal (100
Ω
)
LVDS, CML, LVPECL (AC-coupled)
AC
Internal (100
Ω
)
CML or LVPECL (DC-coupled)
AC
External
LVCMOS
DC
External
through
show recommendations for interfacing LMK05028’s clock inputs with LVCMOS,
LVPECL, LVDS, CML, and HCSL drivers, respectively.
Figure 20. Interfacing LMK05028 Input With LVCMOS Driver (3.3 V, 2.5 V, 1.8 V)
Figure 21. Interfacing LMK05028 Inputs With DC-Coupled LVPECL Driver
Figure 22. Interfacing LMK05028 Inputs With DC-Coupled LVDS Driver
Figure 23. Interfacing LMK05028 Inputs With DC-Coupled CML Driver (Source Terminated)
Summary of Contents for LMK05028
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