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SNAS724 – FEBRUARY 2018
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Programming (continued)
9.5.4.2 Program EEPROM
The EEPROM array is non-volatile memory mapped directly from the SRAM array. After the register settings
have been committed to SRAM (see
), the EEPROM can be programmed from SRAM through the
following sequence:
1. Write EAh to NVMUNLK bits. This unlocks the EEPROM from protected state to allow programming.
2. Write a 1 to NVM_ERASE_PROG bits. This programs EEPROM from the entire SRAM contents. The total
Erase/Program sequence takes about 230 ms.
3. Poll the NVMBUSY bit. The EEPROM programming is done when the NVMBUSY bit is cleared. The
NVMCNT register value will be auto-incremented by 1 to reflect total number of EEPROM programming
cycles completed.
4. (optional) Write 0h to NVMUNLK bits. This locks the EEPROM to protect against inadvertent programming.
On the next power-up or POR cycle, the device will self-start in Soft Pin mode from the newly programmed
EEPROM configuration.
Summary of Contents for LMK05028
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