TXMC638 User Manual Issue 1.0.2
Page 76 of 86
set_property SLEW FAST [get_ports {DM[0]}]
set_property IOSTANDARD SSTL135 [get_ports {DM[0]}]
set_property PACKAGE_PIN AE17 [get_ports {DM[0]}]
set_property SLEW FAST [get_ports {DM[1]}]
set_property IOSTANDARD SSTL135 [get_ports {DM[1]}]
set_property PACKAGE_PIN AA14 [get_ports {DM[1]}]
set_property SLEW FAST [get_ports {DM[2]}]
set_property IOSTANDARD SSTL135 [get_ports {DM[2]}]
set_property PACKAGE_PIN U6 [get_ports {DM[2]}]
set_property SLEW FAST [get_ports {DM[3]}]
set_property IOSTANDARD SSTL135 [get_ports {DM[3]}]
set_property PACKAGE_PIN Y3 [get_ports {DM[3]}]
# DDR3 Data Strobes (DQS)
set_property SLEW FAST [get_ports {DQS_P[0]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_P[0]}]
set_property PACKAGE_PIN AE18 [get_ports {DQS_P[0]}]
set_property SLEW FAST [get_ports {DQS_N[0]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_N[0]}]
set_property PACKAGE_PIN AF18 [get_ports {DQS_N[0]}]
set_property SLEW FAST [get_ports {DQS_P[1]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_P[1]}]
set_property PACKAGE_PIN Y15 [get_ports {DQS_P[1]}]
set_property SLEW FAST [get_ports {DQS_N[1]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_N[1]}]
set_property PACKAGE_PIN Y16 [get_ports {DQS_N[1]}]
set_property SLEW FAST [get_ports {DQS_P[2]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_P[2]}]
set_property PACKAGE_PIN W6 [get_ports {DQS_P[2]}]
set_property SLEW FAST [get_ports {DQS_N[2]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_N[2]}]
set_property PACKAGE_PIN W5 [get_ports {DQS_N[2]}]
set_property SLEW FAST [get_ports {DQS_P[3]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_P[3]}]
set_property PACKAGE_PIN AB1 [get_ports {DQS_P[3]}]
set_property SLEW FAST [get_ports {DQS_N[3]}]
set_property IOSTANDARD DIFF_SSTL135_T_DCI [get_ports {DQS_N[3]}]
set_property PACKAGE_PIN AC1 [get_ports {DQS_N[3]}]
# DDR3 System Clock
set_property SLEW FAST [get_ports {CK_P[0]}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {CK_P[0]}]
set_property PACKAGE_PIN AC13 [get_ports {CK_P[0]}]
set_property SLEW FAST [get_ports {CK_N[0]}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {CK_N[0]}]
set_property PACKAGE_PIN AD13 [get_ports {CK_N[0]}]
# DDR3 Memory Clock
set_property SLEW FAST [get_ports {MCB_CLK_P}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {MCB_CLK_P}]
set_property PACKAGE_PIN AB11 [get_ports {MCB_CLK_P}]
set_property SLEW FAST [get_ports {MCB_CLK_N}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {MCB_CLK_N}]
set_property PACKAGE_PIN AC11 [get_ports {MCB_CLK_N}]
create_clock -period 11.25 [get_ports MCB_CLK_P]
# DDR3 Reference Clock
set_property SLEW FAST [get_ports {REF_CLK_P}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {REF_CLK_P}]
set_property PACKAGE_PIN AA10 [get_ports {REF_CLK_P}]
set_property SLEW FAST [get_ports {REF_CLK_N}]
set_property IOSTANDARD DIFF_SSTL135 [get_ports {REF_CLK_N}]
set_property PACKAGE_PIN AB10 [get_ports {REF_CLK_N}]
create_clock -period 5 [get_ports REF_CLK_P]
