TXMC638 User Manual Issue 1.0.2
Page 14 of 86
4.2.2.1 Local Configuration Register Space
Offset to PCI
Base Address
Register Name
Size (Bit)
0x00 – 0xBF
Reserved
-
0xC0
Interrupt Enable Register
32
0xC4
Interrupt Status Register
32
0xC8
Reserved
-
0xCC
Reserved
-
0xD0
User FPGA Configuration Control/Status Register
32
0xD4
User FPGA Configuration Data Register (Slave SelectMAP)
32
0xD8
Reserved
-
0xDC
Reserved
-
0xE0
ISP Control Register (SPI)
32
0xE4
ISP Configuration Register (SPI)
32
0xE8
ISP Command Register (SPI)
32
0xEC
ISP Status Register (SPI)
32
0xF0
Reserved
-
0xF4
Reserved
-
0xF8
TXMC638 Serial Number
32
0xFC
BCC Code Version
32
Table 4-4 : Local Configuration Register Space
