TXMC638 User Manual Issue 1.0.2
Page 18 of 86
5.2.4 User FPGA Configuration Data Register - 0xD4
Bit
Symbol
Description
Access
Reset
Value
31:0
ISP_FP_DAT
ISP Select Map Write Data
Write Data Register for direct Slave Select Map
FPGA programming mode
Must be written with 32-bit FPGA programming
data until the FPGA Done pin goes high (after the
actual programming data, writing some dummy
data may be required).
w
-
Table 5-4 : User FPGA Configuration Data Register
The User FPGA Configuration Data Register is used to write data within the User FPGA Slave Select Map
Configuration directly to the User FPGA.
