TXMC638 User Manual Issue 1.0.2
Page 4 of 86
Table of Contents
1
PRODUCT DESCRIPTION ........................................................................................... 8
2
TECHNICAL SPECIFICATION ..................................................................................... 9
3
HANDLING AND OPERATION INSTRUCTION ......................................................... 11
ESD Protection ..............................................................................................................................11
3.1
Thermal Considerations...............................................................................................................11
3.2
Assembling Hints..........................................................................................................................11
3.3
4
PCI DEVICE TOPOLOGY ........................................................................................... 12
User FPGA (Kintex-7)....................................................................................................................13
4.1
BCC (Board Configuration Controller) FPGA ............................................................................13
4.2
4.2.1
PCI Configuration Registers (PCR) ........................................................................................13
4.2.2
PCI BAR Overview..................................................................................................................13
4.2.2.1
Local Configuration Register Space ..................................................................................14
4.2.2.2
In-System Programming Data Space ................................................................................15
5
REGISTER DESCRIPTION......................................................................................... 16
User FPGA (Kintex-7)....................................................................................................................16
5.1
Board Configuration Controller (BCC - FPGA) ..........................................................................16
5.2
5.2.1
Interrupt Enable Register - 0xC0 ............................................................................................16
5.2.2
Interrupt Status Register - 0xC4 .............................................................................................16
5.2.3
User FPGA Configuration Control/Status Register - 0xD0.....................................................17
5.2.4
User FPGA Configuration Data Register - 0xD4 ....................................................................18
5.2.5
ISP Control Register - 0xE0....................................................................................................19
5.2.6
ISP Configuration Register - 0xE4..........................................................................................19
5.2.7
ISP Command Register - 0xE8...............................................................................................20
5.2.8
ISP Status Register - 0xEC ....................................................................................................20
5.2.9
TXMC638 Serial Number - 0xF8 ............................................................................................21
5.2.10
BCC - FPGA Code Version - 0xFC.........................................................................................21
6
INTERRUPTS.............................................................................................................. 22
Interrupt Sources ..........................................................................................................................22
6.1
6.1.1
User FPGA (Kintex-7).............................................................................................................22
6.1.2
Board Configuration Controller (BCC - FPGA) .......................................................................22
Interrupt Handling .........................................................................................................................22
6.2
6.2.1
User FPGA (Kintex-7).............................................................................................................22
6.2.2
Board Configuration Controller (BCC - FPGA) .......................................................................22
7
FUNCTIONAL DESCRIPTION.................................................................................... 23
User FPGA Block Diagram...........................................................................................................23
7.1
User FPGA Highlights...................................................................................................................24
7.2
User FPGA Gigabit Transceiver (MGT) .......................................................................................25
7.3
User FPGA Configuration ............................................................................................................27
7.4
7.4.1
Master Serial SPI Flash Configuration....................................................................................27
7.4.2
Manually User FPGA SPI Flash Reconfiguration ...................................................................28
7.4.3
Slave Select Map Configuration .............................................................................................29
7.4.4
Configuration via JTAG...........................................................................................................31
7.4.5
Programming User FPGA SPI Configuration Flash................................................................32
7.4.6
Erasing User FPGA SPI Configuration Flash .........................................................................33
7.4.7
Sector Erasing User FPGA SPI Configuration Flash..............................................................34
7.4.8
Reading User FPGA SPI Configuration Flash........................................................................35
