SoCKit User Manual
75
www.terasic.com
December 1, 2015
GPIO Register Block
The behavior of I/O pin is controlled by the registers in the register block. In this demonstration, we
only use three 32-bit registers in the GPIO controller. The registers are:
gpio_swporta_dr
: used to write output data to output I/O pin
gpio_swporta_ddr
: used to configure the direction of I/O pin
gpio_ext_porta
: used to read input data of I/O input pin
For LED control, we use
gpio_swporta_ddr
to configure the LED pins as output pins, and drive
the pins high or low by writing data to the
gpio_swporta_dr
register. For the
gpio_swporta_ddr
register, the first bit (least significant bit) controls direction of the first IO pin in the associated
GPIO controller and the second bit controls the direction of second IO pin in the associated GPIO
controller, and so on. The value "1" in the register bit indicates the I/O direction is output, and the
value "0" in the register bit indicates the I/O direction is input.
For the
gpio_swporta_dr
register, the first bit controls the output value of first I/O pin in the
associated GPIO controller, and the second bit controls the output value of second I/O pin in the
associated GPIO controller, and so on. The value "1" in the register bit indicates the output value is
high, and the value "0" indicates the output value is low.
For switches and keys control, it is not necessary to configure the pin direction because input-only
pins are used to connect the switches and keys. The status of switches and button can be
queried
by
reading the value of
gpio_ext_porta
register. The first bit represents the input status of first IO pin
in the associated GPIO controller, and the second bit represents the input status of second IO pin in
the associated GPIO controller, and so on. The value "1" in the register bit indicates the input state
is high, and the value "0" indicates the input state is low.
GPIO Register Address Mapping
The registers of HPS peripherals are mapped to HPS base address space 0xFC000000 with 64KB
size. Registers of GPIO1 controller are mapped to the base address 0xFF208000 with 4KB size, and
registers of GPIO2 controller are mapped to the base address 0xFF20A000 with 4KB size, as shown
in
Figure 6-3.
