SoCKit User Manual
45
www.terasic.com
December 1, 2015
Figure 3-28 Connections between Cyclone V SoC FPGA and LCD Module
Table 3-30 LCD Module Pin Assignments
Signal Name
FPGA Pin No.
Description
I/O Standard
HPS_LCM_D_C PIN_G22
HPS LCM Data bit is Data/Command
3.3V
HPS_LCM_RST_N PIN_B26
HPS LCM Reset
3.3V
HPS_LCM_SPIM_CLK PIN_C23
SPI
Clock
3.3V
HPS_LCM_SPIM_MOSI
PIN_D22
SPI Master Output /Slave Input
3.3V
HPS_LCM_SPIM_SS
PIN_D24
SPI Slave Select
3.3V
3
3
.
.
7
7
.
.
1
1
0
0
L
L
T
T
C
C
C
C
o
o
n
n
n
n
e
e
c
c
t
t
o
o
r
r
The board allows connection to interface card from Linear Technology. The interface is
implemented using a14-pin header that can be connected to a variety of demo boards from Linear
Technology. It will be connected to SPI Master and I2C ports of the HPS to allow bidirectional
communication with two types of protocols. The 14-pin header will allow for GPIO, SPI and I2C
extension for user purposes if the interfaces to Linear Technology board aren’t in use. Connections
between the LTC connector and the HPS are shown in
Figure 3-29
, and the functions of the 14 pins
is listed in
Table 3-31
.
