Stanley QB Expert, Instruction Manual

Page: 164 / 214

Supported Instructions and File Types
QB Expert Alpha Controller
156
Instructions Description
CTD
Count Down
Counts false-to-true transitions.
When rung conditions for a CTD instruction have made a false-to-true transition, the
accumulated value is decremented by one count, provided that the rung containing the CTD
instruction is evaluated between these transitions.
The accumulated counts are retained when the rung conditions again becomes false. The
accumulated count is retained until cleared by a reset (RES) instruction that has the same
address as the counter reset.
This Bit Is Set When And Remains Set Until One of
the Following
Count Down
Underflow Bit
OV (Bit 11)
Accumulated value wraps
around to +32,768 from -32,767
A RES instruction having the same
address as the CTD instruction
is executed OR the count is
incremented greater than or equal
to +32,767 with a CTU instruction
Done Bit DN (Bit
13) Accumulated value is equal to or
greater than the preset value The accumulated value becomes
less than the preset value
Count Down
Enable Bit CU
(Bit 14)
rung conditions are true
Rung conditions go false or a RES
instruction having the same address
as the CTD instruction is enabled
CTU
Count Up
Counts false-to-true rung transitions.
When rung conditions for a CTU instruction have made a false-to-true transition, the
accumulated value is incremented by one count, provided that the rung containing the CTU
instruction is evaluated between these transitions.
The accumulated value is retained when the rung conditions again become false. The
accumulated count is retained until cleared by a reset (RES) instruction that has the same
address as the counter reset.
The count value must remain in the range of -32768 to 32767. If the count value goes above
32767 the overflow (OV) bit is set. If the count value goes below -32768, the counter status
underflow (UN) bit is set. A counter can be reset to zero using the reset (RES) instruction.
This Bit Is Set When
And Remains Set Until One of
the Following
Count Up
Overflow Bit OV
(Bit 12) Accumulated value wraps
around to -32,768 from
+32,767
A RES instruction having the same
address as the CTU instruction
is executed OR the count is
decremented less than or equal to
+32,767 with a CTD instruction
Done Bit DN (Bit
13) Accumulated value is equal to
or greater than the preset value The accumulated value becomes
less than the preset value
Count Up Enable
Bit CU (Bit 15)
Rung conditions are true
Rung conditions go false or a RES
instruction having the same address
as the CTU instruction is enabled