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S3C2416X RISC MICROPROCESSOR
IIS MULTI AUDIO INTERFACE
23-13
The Data is aligned in the RX FIFO for 8-bits/channel or 16-bits/channel BLC as shown
RIGHT CHANNEL
LEFT CHANNEL
Figure 23-6. RX FIFO Structure for BLC = 00 or BLC = 01
LOC 0
LOC 1
LOC 2
LOC 3
LOC 4
LOC 5
LOC 6
LOC 7
LOC 8
LOC 9
LOC 10
LOC 11
LOC 12
LOC 13
LOC 14
LOC 15
0
15
7
BLC=00
BLC=01
16
31
BLC=00
BLC=01
23
Summary of Contents for S3C2416
Page 122: ...BUS MATRIX EBI S3C2416X RISC MICROPROCESSOR 3 4 NOTES ...
Page 204: ...DMA CONTROLLER S3C2416X RISC MICROPROCESSOR 8 18 NOTES ...
Page 284: ...WATCHDOG TIMER S3C2416X RISC MICROPROCESSOR 11 6 NOTES ...
Page 320: ...REAL TIME CLOCK S3C2416X RISC MICROPROCESSOR 13 16 NOTES ...
Page 344: ...UART S3C2416X RISC MICROPROCESSOR 14 24 NOTES ...
Page 380: ...USB2 0 DEVICE S3C2416X RISC MICROPROCESSOR 16 34 NOTES ...
Page 432: ...2D S3C2416X RISC MICROPROCESSOR 18 38 NOTES ...
Page 446: ...HS_SPI CONTROLLER S3C2416X RISC MICROPROCESSOR 19 14 NOTES ...
Page 604: ...S3C2416X RISC MICROPROCESSOR S3C2416X RISC MICROPROCESSOR 23 22 NOTES ...
Page 638: ...PCM AUDIO INTERFACE S3C2416X RISC MICROPROCESSOR 25 18 NOTES ...
Page 670: ...ELECTRICAL DATA S3C2416X RISC MICROPROCESSOR 26 32 NOTES ...