Section 15 Serial Communication Interface with FIFO (SCIF)
Rev. 0.50 May 18, 2006 Page 704 of 1588
REJ09B0313-0050
15.3.3
Transmit Shift Register (SCTSR)
SCTSR transmits serial data. The SCIF loads transmit data from the transmit FIFO data register
(SCFTDR) into SCTSR, then transmits the data serially from the TxD pin, LSB (bit 0) first. After
transmitting one data byte, the SCIF automatically loads the next transmit data from SCFTDR into
SCTSR and starts transmitting again.
The CPU cannot read from or write to SCTSR directly.
7
6
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4
3
2
1
0
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit:
Initial value:
R/W:
15.3.4
Transmit FIFO Data Register (SCFTDR)
SCFTDR is a 16-byte FIFO register that stores data for serial transmission. When the SCIF detects
that the transmit shift register (SCTSR) is empty, it moves transmit data written in the SCFTDR
into SCTSR and starts serial transmission. Continuous serial transmission is performed until there
is no transmit data left in SCFTDR. The CPU can write to SCFTDR at all times.
When SCFTDR is full of transmit data (16 bytes), no more data can be written. If writing of new
data is attempted, the data is ignored.
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1
0
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-
-
-
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-
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W
W
W
W
W
W
W
W
Bit:
Initial value:
R/W:
Summary of Contents for Single-Chip Microcomputer SH7203
Page 2: ...Rev 0 50 May 18 2006 Page ii of xxx ...
Page 30: ...Rev 0 50 May 18 2006 Page xxx of xxx ...
Page 52: ...Section 1 Overview Rev 0 50 May 18 2006 Page 22 of 1588 REJ09B0313 0050 ...
Page 98: ...Section 2 CPU Rev 0 50 May 18 2006 Page 68 of 1588 REJ09B0313 0050 ...
Page 128: ...Section 4 Clock Pulse Generator CPG Rev 0 50 May 18 2006 Page 98 of 1588 REJ09B0313 0050 ...
Page 200: ...Section 6 Interrupt Controller INTC Rev 0 50 May 18 2006 Page 170 of 1588 REJ09B0313 0050 ...
Page 242: ...Section 8 Cache Rev 0 50 May 18 2006 Page 212 of 1588 REJ09B0313 0050 ...
Page 400: ...Section 9 Bus State Controller BSC Rev 0 50 May 18 2006 Page 370 of 1588 REJ09B0313 0050 ...
Page 696: ...Section 13 Watchdog Timer WDT Rev 0 50 May 18 2006 Page 666 of 1588 REJ09B0313 0050 ...
Page 726: ...Section 14 Realtime Clock RTC Rev 0 50 May 18 2006 Page 696 of 1588 REJ09B0313 0050 ...
Page 876: ...Section 17 I2 C Bus Interface 3 IIC3 Rev 0 50 May 18 2006 Page 846 of 1588 REJ09B0313 0050 ...
Page 1054: ...Section 21 D A Converter DAC Rev 0 50 May 18 2006 Page 1024 of 1588 REJ09B0313 0050 ...
Page 1294: ...Section 24 LCD Controller LCDC Rev 0 50 May 18 2006 Page 1264 of 1588 REJ09B0313 0050 ...
Page 1386: ...Section 26 I O Ports Rev 0 50 May 18 2006 Page 1356 of 1588 REJ09B0313 0050 ...
Page 1512: ...Section 30 List of Registers Rev 0 50 May 18 2006 Page 1482 of 1588 REJ09B0313 0050 ...
Page 1598: ...Section 31 Electrical Characteristics Rev 0 50 May 18 2006 Page 1568 of 1588 REJ09B0313 0050 ...
Page 1606: ...Appendix Rev 0 50 May 18 2006 Page 1576 of 1588 REJ09B0313 0050 ...
Page 1618: ...Rev 0 50 May 18 2006 Page 1588 of 1588 REJ09B0313 0050 ...
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Page 1622: ...SH7203 Group Hardware Manual ...