M16C/62P Group (M16C/62P, M16C/62PT)
23. Electrical Characteristics
Rev.2.41
Jan 10, 2006
Page 317 of 390
REJ09B0185-0241
V
CC1
=V
CC2
=5V
Switching Characteristics
(V
CC1
= V
CC2
= 5V, V
SS
= 0V, at T
opr
=
−
20 to 85
°
C /
−
40 to 85
°
C unless otherwise specified)
NOTES:
1.
Calculated according to the BCLK frequency as follows:
f(BCLK) is 12.5MHz or less.
2.
Calculated according to the BCLK frequency as follows:
3.
This standard value shows the timing when the output is off, and
does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t =
−
CR X ln (1
−
V
OL
/ V
CC2
)
by a circuit of the right figure.
For example, when V
OL
= 0.2V
CC2
, C = 30pF, R = 1k
Ω
, hold time
of output ”L” level is
t =
−
30pF X 1k
Ω
X In(1
−
0.2V
CC2
/ V
CC2
)
= 6.7ns.
Figure 23.2
Ports P0 to P14 Measurement Circuit
Table 23.27
Memory Expansion and Microprocessor Modes (for setting with no wait)
Symbol
Parameter
Standard
Unit
Min.
Max.
t
d(BCLK-AD)
Address Output Delay Time
See
Figure 23.2
25
ns
t
h(BCLK-AD)
Address Output Hold Time (in relation to BCLK)
4
ns
t
h(RD-AD)
Address Output Hold Time (in relation to RD)
0
ns
t
h(WR-AD)
Address Output Hold Time (in relation to WR)
(NOTE 2)
ns
t
d(BCLK-CS)
Chip Select Output Delay Time
25
ns
t
h(BCLK-CS)
Chip Select Output Hold Time (in relation to BCLK)
4
ns
t
d(BCLK-ALE)
ALE Signal Output Delay Time
15
ns
t
h(BCLK-ALE)
ALE Signal Output Hold Time
−
4
ns
t
d(BCLK-RD)
RD Signal Output Delay Time
25
ns
t
h(BCLK-RD)
RD Signal Output Hold Time
0
ns
t
d(BCLK-WR)
WR Signal Output Delay Time
25
ns
t
h(BCLK-WR)
WR Signal Output Hold Time
0
ns
t
d(BCLK-DB)
Data Output Delay Time (in relation to BCLK)
40
ns
t
h(BCLK-DB)
Data Output Hold Time (in relation to BCLK)
(3)
4
ns
t
d(DB-WR)
Data Output Delay Time (in relation to WR)
(NOTE 1)
ns
th(WR-DB)
Data Output Hold Time (in relation to WR)
(3)
(NOTE 2)
ns
t
d(BCLK-HLDA)
HLDA Output Delay Time
40
ns
0.5x10
9
f BCLK
(
)
------------------------
40 ns
[
]
–
0.5x10
9
f BCLK
(
)
------------------------
10 ns
[
]
–
DBi
R
C
P6
P7
P8
P10
P9
P0
P1
P2
P3
P4
P5
30pF
P11
P12
P13
P14
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