Renesas M16C/62P Group, Hardware Manual

Page: 174 / 421

M16C/62P Group (M16C/62P, M16C/62PT) 15. Timers
Rev.2.41 Jan 10, 2006 Page 159 of 390
REJ09B0185-0241
15.2.1 Timer Mode
In timer mode, the timer counts a count source generated internally (see Table 15.6). Figure 15.19 shows
TBiMR Register in Timer Mode.
NOTES:
1. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register, and the TB3S to
TB5S bits are assigned to the bit 5 to bit 7 in the TBSR register.
Figure 15.19 TBiMR Register in Timer Mode
Table 15.6 Specifications in Timer Mode
Item Specification
Count Source f1, f2, f8, f32, fC32
Count Operation • Down-count
• When the timer underflows, it reloads the reload register contents and
continues counting
Divide Ratio 1/(n+1) n: set value of TBi register (i= 0 to 5) 0000h to FFFFh
Count Start Condition Set TBiS bit
(1)
to “1” (= start counting)
Count Stop Condition Set TBiS bit to “0” (= stop counting)
Interrupt Request
Generation Timing Timer underflow
TBiIN Pin Function I/O port
Read from Timer Count value can be read by reading TBi register
Write to Timer • When not counting and until the 1st count source is input after counting start
Value written to TBi register is written to both reload register and counter
• When counting (after 1st count source input)
Value written to TBi register is written to only reload register
(Transferred to counter when reloaded next)
Timer Bi Mode Register (i= 0 to 5)
Address After Reset
039Bh to 039Dh 00XX0000b
035Bh to 035Dh 00XX0000b
Bit Symbol Function RW
RW
—
NOTES :
1.
0
MR2
Count Source Select Bit b7 b6
0 0 : f1 or f2 (1)
0 1 : f8
1 0 : f32
1 1 : fC32
When w rite in timer mode, set to “0”.
When read in timer mode, its content is indeterminate.
TCK1
b1 b0
0 0 : Timer mode
TMOD0 RW
0
b3 b2 b1 b0 b7 b6 b5 b4
Symbol
TMOD1
TB0MR to TB2MR
RW
RW
RO
MR1
TCK0
Has no effect in timer mode
Can be set to “0” or “1”
TB0MR, TB3MR registers
Set to “0” in timer mode
Selected by PCLK0 bit in the PCLKR register.
Bit Name
Operation Mode Select Bit
TB3MR to TB5MR
TB1MR, TB2MR, TB4MR, TB5MR registers
Nothing is assigned. When w rite, set to “0”.
When read, its content is indeterminate
RW
MR3
RW
MR0 RW
http://www.xinpian.net 提供单片机解密、IC解密、芯片解密业务 010-62245566 13810019655