Renesas M16C/62P Group, Hardware Manual

Page: 311 / 421

M16C/62P Group (M16C/62P, M16C/62PT) 22. Flash Memory Version
Rev.2.41 Jan 10, 2006 Page 296 of 390
REJ09B0185-0241
NOTES:
1. Available in only the 128-pin version.
2. When using the standard serial I/O mode, the internal pull-up is enabled for the TXD1 (P6_7) pin
while the RESET pin is “L”.
3. When using the standard serial I/O mode, the P0_0 to P0_7, P1_0 to P1_7 pins may become
indeterminate while the P8_4 pin is “H” and the RESET pin is “L”. If this causes a program, apply “L”
to the P8_4 pin.
Table 22.7 Pin Functions (Flash Memory Standard Serial I/O Mode)
Pin Name I/O
Power
Supply
Description
VCC1, VCC2,
VSS Power Input
−
Apply the Flash Program, Erase Voltage to VCC1 pin
and VCC2 to the VCC2 pin. The VCC apply condition is
that VCC2
≤
VCC1. Apply 0 V to VSS pin.
CNVSS CNVSS I VCC1 Connect to VCC1 pin.
RESET
Reset Input I VCC1 Reset input pin. While RESET pin is “L” level, input a 20
cycle or longer clock to XIN pin.
XIN Clock Input I VCC1 Connect a ceramic resonator or crystal oscillator
between XIN and XOUT pins. To input an externally
generated clock, input it to XIN pin and open XOUT pin.
XOUT Clock Output O VCC1
BYTE BYTE I VCC1 Connect this pin to VCC1 or VSS.
AVCC, AVSS Analog Power Supply
Input Connect AVSS to VSS and AVCC to VCC1,
respectively.
VREF Reference Voltage Input I Enter the reference voltage for A/D from this pin.
P0_0 to P0_7 Input Port P0 I VCC2 Input “H” or “L” level signal or open.
P1_0 to P1_7 Input Port P1 I VCC2 Input “H” or “L” level signal or open.
P2_0 to P2_7 Input Port P2 I VCC2 Input “H” or “L” level signal or open.
P3_0 to P3_7 Input Port P3 I VCC2 Input “H” or “L” level signal or open.
P4_0 to P4_7 Input Port P4 I VCC2 Input “H” or “L” level signal or open.
P5_1 to P5_4,
P5_6, P5_7 Input Port P5 I VCC2 Input “H” or “L” level signal or open.
P5_0
CE Input
I VCC2 Input “H” level signal.
P5_5
EPM Input
I VCC2 Input “L” level signal.
P6_0 to P6_3 Input Port P6 I VCC1 Input “H” or “L” level signal or open.
P6_4/RTS1 BUSY Output O VCC1 Standard serial I/O mode 1: BUSY signal output pin
Standard serial I/O mode 2: Monitors the boot program
operation check signal output pin.
P6_5/CLK1 SCLK Input I VCC1 Standard serial I/O mode 1: Serial clock input pin
Standard serial I/O mode 2: Input “L”.
P6_6/RXD1 RXD Input I VCC1 Serial data input pin.
P6_7/TXD1 TXD Input O VCC1 Serial data output pin.
(2)
P7_0 to P7_7 Input Port P7 I VCC1 Input “H” or “L” level signal or open.
P8_0 to P8_3,
P8_6, P8_7 Input Port P8 I VCC1 Input “H” or “L” level signal or open.
P8_4 P8_4 input
I VCC1 Input “L” level signal.
(3)
P8_5/NMI NMI Input
I VCC1 Connect this pin to VCC1.
P9_0 to P9_7 Input Port P9 I VCC1 Input “H” or “L” level signal or open.
P10_0 to P10_7 Input Port P10 I VCC1 Input “H” or “L” level signal or open.
P11_0 to P11_7 Input Port P11 I VCC1 Input “H” or “L” level signal or open.
(1)
P12_0 to P12_7 Input Port P12 I VCC2 Input “H” or “L” level signal or open.
(1)
P13_0 to P13_7 Input Port P13 I VCC2 Input “H” or “L” level signal or open.
(1)
P14_0, P14_1 Input Port P14 I VCC1 Input “H” or “L” level signal or open.
(1)
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