Part II: PCM-959/phyCORE-OMAP44xx Carrier Board
phyCORE-OMAP44xx
110
©
PHYTEC Messtechnik GmbH
2012
L-760e_1
The phyCORE-OMAP44xx Carrier Board supports both display interfaces provided by the phyCORE-OMAP44xx.
The parallel display interface and the DSI interface signals are converted into LVDS and are available at the
PHYTEC Display -Interface (PDI) which is described in the following paragraph. In addition, the parallel display
interface is available at expansion connector X5.
The various performance classes of the phyCORE family allow to attach a large number of different displays
varying in resolution, signal level, type of the backlight, pin-out, etc. In order not to limit the range of displays
connectable to the phyCORE, the phyCORE-OMAP44xx Carrier Board has no special display connector suitable
only for a small number of displays. The new concept intends the use of an adapter board (e.g. PHYTECs LCD
display adapters LCD-014 and LCD-017) to attach a special display, or display family to the phyCORE.
A new Phytec Display-Interface (PDI) was defined to connect the adapter board to the phyCORE-OMAP44xx
Carrier Board. It consists of two universal connectors which provide the connectivity for the display adapter.
They allow easy adaption also to any customer display adapter. One connector (40 pin FCC connector 0.5mm
pitch) at X12 is intend for connecting all data signals to the display adapter. It combines various interface
signals like LVDS, USB, I
2
C, etc. required to hook up a display. The second connector of the PDI (AMP microMatch
8-338069-2) at X13 provides all supply voltages needed to supply the display and a backlight, and the
brightness control.
The following sections contain specific information on each connector.
2.1.3.7.1 PDI Data Connector (X12)
PDI data connector X12 provides display data from the parallel display interface, or the DSI1 interface of the
OMAP44xx. After the signals from either display interface are converted to LVDS two multiplexer at U51 and U52
forward the LVDS signals to the PDI data connector. Jumper JP13 allows to select which data is forwarded.
If jumper JP13 is open PDI data connector X12 provides the display signals from the parallel display interface of
the phyCORE-OMAP44xx (see
). These signals are converted into LVDS by the Texas Instruments
SN75LVDS83B FlatLink™ transmitter at U32. The SN75LVDS83B is a 4-channel 24-bit LVDS transmitter and
supports displays up to 1366x768 24-bit pixel resolution. Jumper J20 allows to select either rising, or falling
edge strobe for the input clock signal of the FlatLink™ transmitter. The default configuration selects rising edge
strobe (see
The signals of the parallel display interface are also available at expansion connector X5 to allow for designing
a custom specific display interface. Please refer to
If jumper JP13 is closed data from the OMAP44xx's DSI1 interface is forwarded to the PDI data connector X12.
The DSI interface of the phyCORE-OMAP44xx (refer to
) extends to the Toshiba TC358764
DSI2LVDS Bridge Chip mounted at U8 on the phyCORE-OMAP44xx Carrier Board. This chip functions primarily as
a DSI-to-LVDS communication protocol bridge, allowing to connect an LVDS display to the DSI1 Display
Interface of the OMAP44xx. The DSI-RX receiver supports from 1- to 4-Lane configurations and the LVDS
transmitter displays up to 1366 x 768 24-bit pixel resolution. The TC358764 can be configured via I
2
C interface
(I2C4) at address 0x0F. It also features a test mode, which can be entered by closing jumper J7 at 1+2
(Please refer to the TC358764 "Functional Specification" for more information). The default configuration
Note:
If the parallel display interface of the phyCORE-OMAP44xx is intend to be used with a custom hardware
connected to expansion connector X5 closing jumper JP14 at position 2+3 shuts down the FlatLink™
transmitter. This allows to avoid signal conflicts and to reduce disturbances.
