Phytec phyCORE-i.MX35, Hardware Manual

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System Memory
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PHYTEC Messtechnik GmbH 2010 L-734e_1
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7.1 Memory Model
The i.MX35x memory map is summarized in Table 6 below. For a detailed view of the memory map
please consult the Freescale i.MX35 User’s Manual .
Table 6: i.MX35 Memory Map
A
DDRESS
C
HIP
-S
ELECT
F
UNCTION
0x8000 0000 – 0x8FFF FFFF CSD0 DDR2-SDRAM Bank 0 (U6, U7)
0x9000 0000 – 0x9FFF FFFF CSD1 not used on phyCORE-i.MX35
0xA000 0000 – 0xA7FF FFFF WEIM CS0 (flash 128)¹ NOR-Flash (U9)
0xA800 0000 – 0xAFFF
FFFF WEIM CS1 (flash 64)
multiplexed with NANDF_CE3
0xB000 0000 – 0xB1FF FFFF WEIM CS2 (SRAM) used as CSD0
0xB200 0000 – 0xB3FF FFFF WEIM CS3 not used on phyCORE-i.MX35
0xB400 0000 – 0xB5FF FFFF WEIM CS4 not used on phyCORE-i.MX35
0xB600 0000 – 0xB7FF FFFF WEIM CS5 not used on phyCORE-i.MX35
0xBB00 0000 – 0xBB00 11FF
NFC memory region¹
(4K, NAND Flash)
NAND-Flash (U10)
1. Can be used as a boot memory region