Phytec phyCORE-i.MX35, Hardware Manual

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The phyCORE-i.MX on the Development Board
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PHYTEC Messtechnik GmbH 2010 L-734e_1
99
JP34
1+2,3+4
Open,Open
No power switching, direct supply from VCC_3V3
Separate supply path
JP35
Open
Closed
VCC_5V Power Supply is enabled
VCC_5V Power Supply is disabled
JP36
Open
Closed
VCC_3V3 Power Supply is disabled
VCC_3V3 Power Supply is enabled
JP37
Open
Closed
Chargemode is Single Path
Chargemode is Dual Path
JP38
1+2,3+4
Open,Open
Power switching, supply from 5 V adapter or POE
No power switching, direct supply from VCC_3V3
JP39
1+2,3+4
Open,Open
Power switching active, Battery charge path closed
No power switching, direct supply from VCC_3V3
JP40
Open
Closed
No power switching active, minimum circuit
Power switching active
JP42
1+2
2+3
USB VBUS power enable managed on baseboard
USB VBUS power enable managed on module
JP43
1+2
2+3
USB VBUS overcurrent managed on the baseboard
USB VBUS overcurrent managed on the module
JP44
open
closed
USB Host is managed on the module
USB Host is managed on the baseboard
JP45
1+2
2+3
USB Host is managed on the baseboard
USB Host is managed on the module
JP46
1+2
2+3
USB Host is managed on the baseboard
USB Host is managed on the module
JP47
open
closed
Reset of audio/touch device is not controllable
Reset of audio/touch device is controllable via GPIO
JP48
open
closed
IRQ of audio/touch device is not controllable
IRQ of audio/touch device is controllable via GPIO
JP49
open
closed
PENDOWN of audio/touch device is not controllable
PENDOWN of audio/touch device is controllable via GPIO
JP50
open
closed
SD card write protect is not connected to the module
SD card write protect is connected to the module
JP602
Open
Closed
PC_RW inverted
PC_RW non-inverted
JP604
Open
Closed
CF power is manged by x_EXP007
Force enabling VCC_CFL