EN 181
3139 785 31532
9.
Circuit- and IC description
9.6.2 Digital
Board
IC7601 - NCP1571D - Low voltage Synchronous Buck Controller
BLOCK
DIAGRAM
–
+
UVLO COMP
–
+
–
+
–
+
Fault Latch
Set Dominant
+
–
0.25 V
Error Amp
+
R
S
Q
PWM Latch
Reset Dominant
PWM COMP
+
Σ
OSC
Art Ramp
80%, 200 kHz
0.525 V
+
–
8.5 V/7.5 V
+
–
0.980 V
S
R
Q
V
CC
GND
V
FB
COMP
GATE(H)
GATE(L)
PGDELAY
PWRGD
Non
Overlap
V
CC
+
–
0.88 V/0.69 V
+
–
+
–
0.25 V
S
R
Q
PGDELAY Latch
Set Dominant
–
+
+
–
3.3 V
12
μ
A
–
–
Figure 9-15