EN 184
3139 785 31532
9.
Circuit- and IC Description
PIN CONFIGURATION
64
GND_IO
63
CLKIN_B
62
S7
61
S6
60
S5
59
S4
58
S3
57
DGND
56
V
DD
55
S2
54
S1
53
S0
52
TEST5
51
TEST4
50
S_HSYNC
49
S_VSYNC
47
R
SET1
46
V
REF
45
COMP1
42
DAC C
43
DAC B
44
DAC A
48
S_BLANK
41
V
AA
40
AGND
39
DAC D
37
DAC F
36
COMP2
35
R
SET2
34
EXT_LF
33
RESET
38
DAC E
2
TEST0
3
TEST1
4
Y0
7
Y3
6
Y2
5
Y1
1
V
DD_IO
8
Y4
9
Y5
10
V
DD
12
Y6
13
Y7
14
TEST2
15
TEST3
16
C0
11
DGND
17
C1
18
C2
19
I
2
C
20
ALSB
21
SDA
22
SCLK
23
P_HSYNC
24
P_VSYNC
25
P_BLANK
26
C3
27
C4
28
C5
29
C6
30
C7
31
RTC_SCR_TR
32
CLKIN_A
PIN 1
ADV7322
TOP VIEW
(Not to Scale)
05067-
019
Figure 9-17