EN 148
3139 785 31532
7.
Circuit Diagrams and PWB Layouts
Digital: Prog Scan DAC
TEST
DAC
GND_IO
DGND
6
VREF
3
4
5
2
3
RSET1
ALSB
I2C
SDA
6
7
5
VAA
SCLK
CLKIN_B
4
5
6
7
0
1
2
3
4
5
CLKIN_A
F
4
EXT_LF
E
D
C
B
A
RESET
P_BLANK
P_VSYNC
P_HSYNC
S_BLANK
2
3
0
1
7
0
1
S
C
Y
S_VSYNC
S_HSYNC
COMP2
COMP1
AGND
0
2
1
RSET2
RTC_SCR_TR
VDD
VDD_IO
COM
OUT
IN
I
GND
GND
GND
%
1
d
e
s
u t
o
n
B
C
D
E
F
G
H
I
1002 D14
2024 A8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
E
F
G
H
I
A
GND
2600 A7
2601 A7
2603 A9
2604 A9
2605 A1
2606 A2
2607 A10
2608 A11
2609 A11
2610 A3
2611 B3
2612 B3
2613 B3
2614 C9
2615 C10
2616 C2
2617 C4
2618 C2
2619 D2
2620 D4
2621 D4
2622 D5
2623 D2
2624 D4
2625 E7
2626 E9
2627 E10
2628 G9
2629 G10
2630 G4
%
1
d
e
s
u t
o
n
Y
D
R
A
O
B
G
O
L
A
N
A
O
T
2631 G4
2632 A2
2633 A8
2634 A8
2635 A10
2636 A10
2637 B3
3035 C12
3037 B13
3601 C9
3602 C10
3604 C11
%
1
%
1
3605 E7
3606 D5
3607 D6
3608 E7
3609 D5
3610 D5
3611 D13
3612 E9
3613 E10
3614 E12
3615 E11
3616 F13
3617 G9
3618 G10
PR
3619 F6
3620 G3
3621 F5
3622 G7
3623 G7
3624 F5
3625 G12
3626 G11
3627 G5
3628 G5
3629 G6
3630 H5
3631 H5
3632 H6
3633 D6
3634 D6
3635 E2
3636 E2
3637 E2
3638 E2
3639 E2
d
e
s
u t
o
n
%
1
3640 E2
3641 E2
3642 E2
3643 F2
3644 F2
3645 F2
3646 F2
3647 F2
3648 F2
3649 F2
3650 F2
4600 G7
4601 C11
4602 E11
4603 G11
5600 A7
5601 A9
5603 A11
d
e
s
u
t
o
n
GND
%
1
5604 B9
5605 B10
5606 D9
5607 D10
5608 F9
5609 F10
7600 A2
7601 B12
7602-1 D12
PB
7602-2 F12
7603 D3
F1601 D14
F1602 D14
F1604 D13
F1606 D14
F725 C3
F726 D3
F727 C3
I724 B9
I725 B10
I726 D9
I727 D10
I728 F9
I729 F10
V
6
1
u
7
4
1
0
6
2
3035
GND
1%
1K0
GND
5603
4u7
n
0
0
1
3
0
6
2
R
0
0
3
2
0
6
3
3619
7
K
4
100R
330R
3632
2
2
6
3
10R
3628
1%
F1606
1%
75R
3037
8
2
6
2
n
0
0
1
8
0
6
2
5608
8
p
6
5
0
6
3
0
0
6
4
R
2
2
5
2
7
F
F726
3629
330R 1%
75R
3611
1%
D
N
G
p
3
3
7
2
6
2
7601
3
4
1
5
2
AD8091ART
I725
10n
3631
10R
n
0
0
1
2619
2
2
6
2
7
u
4
4
0
6
2
7
0
6
3
K
0
1
GND
4u7
5601
1
0
6
4
GND
3
2
6
3
7
K
4
2K7
3630
1%
PROG SCAN DAC
4
3
6
2
0
n
1
1n0
2620
5
3
6
2
0
n
1
0
n
1
6
3
6
2
5606
8
p
6
6
2
6
2
GND
K
0
1
3
3
6
3
2
1
6
3
F1604
R
0
0
3
1%
3616
75R
2618
1n0
2u2
5607
2K7 1%
3650
10R
3627
2
1
8
4
3648
10R
7602-1
AD8092AR
3
3625
1%
1K0
GND
R
0
0
3
3
1
6
3
F1602
3n9
2630
2
0
6
4
3
0
6
4
4
0
6
3
%
1
0
K
1
n
0
0
1
5
0
6
2
I729
1
2
6
2
n
0
0
1
2u2
5609
2624
100n
3639
10R
3638
10R
3637
10R
3636
10R
3635
10R
4
3
6
3
K
0
1
2637
100n
0
n
1
3
3
6
2
3621
33R
4
2
0
2
I728
n
0
0
1
%
1
0
K
1
6
2
6
3
F1601
V
5
3
7
u
4
6
0
6
2
5
6
7
8
4
AD8092AR
7602-2
100n
2612
12
13
3624
100R
0
1
6
5
1
46
4
5
6
7
8
9
21
48
50
49
2
3
14
15
51
52
1
4
35
31
53
54
55
58
59
60
61
62
22
1
1
7
5
34
4
6
19
25
23
24
33
47
30
32
63
45
36
44
43
42
39
38
37
0
4
20
16
17
18
26
27
28
29
VIDEO
Φ
ADV7322KST
7603
ENCODER
1n0
GND
4
5
6
7
2625
PSCAN
07FMN-BMT-A-TFT
1002
1
2
3
10R
7
0
6
2
n
0
0
1
3649
3647
10R
4V
220u
2610
2
3
6
2
n
0
0
1
BLM21
5600
10R
3645
3643
10R
3642
10R
3641
10R
3640
10R
16V
47u
2616
1%
1K0
3614
3620
680R
R
0
0
3
7
1
6
3
R
0
0
3
8
1
6
3
p
3
3
5
1
6
2
2613
10n
K
0
1
9
0
6
3
I726
R
0
0
3
1
0
6
3
10n
2611
p
3
3
9
2
6
2
9
0
6
2
7
u
4
0
0
6
2
n
0
0
1
2623
100n
8
p
6
4
1
6
2
GND
GND
3608
47K
2u2
5605
5604
3
7600
LF25CDT
2
1
7
2
7
F
3646
10R
10n
2617
820p
2631
10R
I724
3644
GND
K
0
1
0
1
6
3
I727
%
1
0
K
1
5
1
6
3
K
0
1
6
0
6
3
ITU_OUT(2)
ITU_OUT(3)
ITU_OUT(4)
ITU_OUT(5)
ITU_OUT(6)
ITU_OUT(7)
ITU_OUT(7:0)
+5V_PS
PNX7100_ITU_OUT_CLK
+2V5
+2V5
P_CLK
Y
_
D
i
U
i
V
ITU_OUT(0)
CbCr(0)
CbCr(2)
CbCr(4)
CbCr(1)
CbCr(3)
CbCr(5)
SCL0
ITU_OUT(1)
+3V3
n
N
A
C
S
G
O
R
P
_
T
E
S
E
R
+5V
CbCr(7)
CbCr(0:7)
Y(4)
Y(0)
Y(2)
Y(6)
Y(1)
Y(3)
Y(5)
Y(7)
+3V3D_VDAC
+2V5
+2V5
+2V5
+3V3D_VDAC
+3V3D_VDAC
+3V3D_VDAC
+2V5
+2V5
+2V5
CbCr(6)
Y(0:7)
-5V_PS
-5V_PS
-5V_PS
+3V3
SDA0
+5V_PS
+5V_PS
-5V
-5V_PS
+5V_PS
3103_603_30601_a2_sh130_sh6.pdf 2004-12-01