EN 146
3139 785 31532
7.
Circuit Diagrams and PWB Layouts
Digital: Chrysalis
I 2 C
NI
4
9
3
1
E
C
A
F
R
E
T
NI
O
E
DI
V
L
A
TI
GI
D
O
E
DI
V
G
O
L
A
N
A
N
A
C
S
G
O
R
P
PIOS
TEST
GENERAL
DIGITAL AUDIO INTERFACE
UARTS
1-
E
B
E
DI
M
A
R
D
S
PCI/XIO
1394 OUT
G3
1
2
3EN2
3EN1
not used
d
e
s
u t
o
n
11
12
13
14
A
B
C
D
E
F
G
H
I
A
B
C
D
E
F
G
H
I
1400 C14
yl
n
o
3
C
r
of
32 MB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
UART0: DEBUG / SERVICE
1401 I5
2400 A9
2401 A9
2402 A9
2403 A12
2404 H12
2405 G13
2406 G13
2407 G13
2408 H12
2409 H12
2410 H13
2411 H13
2412 H13
2413 H13
2414 H13
2415 H14
2416 H14
2417 H14
2418 I12
2419 I13
2420 I12
2421 I12
2422 I13
2423 I13
2424 I13
2425 I13
2426 I13
2427 I14
64 MB
yl
n
o
4
0
0
2
r
of
2428 I14
2429 I14
2430 I5
2431 I6
2432 H1
2433 I7
2434 I6
2435 A9
3400 A14
3401 A14
3402 A14
3403 A14
3404 A14
3405 A12
3406 A12
3407 A12
3408 A12
3409 A14
3410 A14
3411 A14
3412 A14
3413 B14
3414 B14
3415 B14
3416 B14
not used
3417 B14
3418 B14
3419 B14
3420 C14
3421 C14
3422 C14
3423 C14
3424 C13
3425 C13
3426 C13
3427 C13
3428 C13
3429 D13
3430 E13
3431 E13
3432 E13
3433 E1
3434 E2
3435 E1
3436 F13
3437 F13
3438 F13
3439 G13
UART1: DEV ONLY
3440 G13
3441 F1
3442 D2
3443 D1
3444 D2
3445 D1
3446 D2
3447 D1
3448 D2
3449 D1
3450 C2
3451 C2
3452 F1
3453 A10
3454 A11
3455 A10
3456 A11
3457 A10
3458 B11
3459 B10
3460 B11
3461 B10
3462 B11
3463 B10
3464 B11
3465 B10
3466 B11
3467 B10
3468 B10
3469 B11
3470 B10
3471 C11
3472 C10
3473 C11
3474 C10
3475 C11
3476 C10
3477 C11
3478 C10
3479 C11
3480 C10
3481 C11
3482 C10
3483 C11
3484 C10
3485 D11
3486 D10
3487 D11
3488 D10
X
d
e
s
u t
o
n
d
e
s
u t
o
n
3489 D11
3490 D10
3491 D11
3492 D10
3493 D11
3494 D10
3495 D11
3496 D10
3497 I4
3498 F1
3499 F1
3603 C2
3820 D1
3821 D1
3822 D1
3823 D1
3824 D1
3825 D1
3826 D1
3827 D1
3828 A1
*
*
SDRAM
not used
3829 A1
3830 B1
3831 B1
3832 B1
3833 B1
3834 B1
3835 B1
3836 D11
3837 I1
3838 I1
3839 I1
3840 D10
3850 H2
3851 H2
3852 E11
3853 E10
3854 E11
3855 E10
3856 E11
-
*
3857 E10
3858 E11
3859 E11
3860 F11
3861 I6
3862 I5
3863 I6
4401 I5
4402 I4
4403 I4
4404 H2
4405 G1
4406 I2
4407 I2
4408 I2
4409 I2
4410 I2
not used
4411 H3
5400 A13
5401 G12
5402 H12
5403 H1
5404 I7
5405 I12
5406 I12
7400 A2
7401 H1
7402 I6
7403 I5
F1401 C14
F1402 C14
F1403 C14
F1405 D14
F1407 D14
F1409 D14
UART2: DTTM
X
d
e
s
u t
o
n
UART3: G-LINK
F1411 E14
F1413 E14
F1415 E14
F1417 E14
F1419 F14
F1421 F14
F1423 F14
F1425 G14
F1427 G14
F400 A12
F401 A12
F402 A8
F403 C2
F404 C2
F405 I5
F406 I5
)
yl
n
o
s
n
oi
sr
e
v
w
e
n
r
of
(
m
m
7
2.
1
h
cti
p
G
A
T
J
E
I402 I1
I403 I4
I404 E10
I405 E10
I406 E10
I407 I6
I408 I6
I409 I6
I410 I7
I411 I7
I412 I7
I413 A12
I414 G12
I415 H12
I416 I12
I417 I12
I418 A14
I419 A14
I420 A14
I421 A14
I422 A14
I423 A14
3831
-
1%
I424 A14
I425 A14
I426 A14
I427 A14
I428 B14
I429 B14
I430 B14
I431 B14
I432 B14
I433 B14
not used
not used
I434 B14
I435 C14
I436 C14
I437 C14
I438 A12
I439 A12
VDD_PNX_PLL
not used
3823
d
e
s
u t
o
n
not used
15R
3434
VDD_PNX_PAD
10K
3424
n
0
0
1
7
1
4
2
u
0
1
22R
8
1
4
2
3836
4K7
3403
3470
22R
VDD_PNX_PAD
3852
22R
22R
3472
22R
3858
3857
22R
3449
22R
2
5
4
3
K
0
1
4K7
3830
K
0
1
1
4
4
3
4
0
4
4
33R
3429
6
0
4
4
3490
22R
n
0
0
1
8
2
4
2
+3V3
7
K
4
0
2
8
3
7
0
4
2
n
0
0
1
I426
4K7
3418
10R
3450
7
K
4
1
2
8
3
BLM31
5401
n
0
0
1
3
2
4
2
3
K
3
7
0
4
3
1
1
4
2
n
0
0
1
22R
3859
8
0
4
2
u
0
1
3
K
3
5
0
4
3
22R
3459
3448
4K7
3833
22R
10R
3451
+3V3
n
0
0
1
3
0
4
2
F1402
9
0
4I
100p
2435
BLMP18P
5404
I404
3
0
4
4
3862
330R
VDD_PNX_CORE
33p
2434
VDD_PNX_PAD
I434
3439
33R
1
0
4
4
3834
4K7
4K7
3411
+3V3
3476
22R
2431
15p
3438
33R
2402
100p
7
0
4I
0
1
4I
2
1
4I
7
2
4
2
n
0
0
1
n
0
0
1
5
2
4
2
F1427
1
1
4I
15p
2430
7
K
4
7
2
8
3
22R
3483
33R
3437
F1409
I432
I419
6
2
4
3
K
0
1
22R
3442
22R
3446
7403
23
24
25
26
27
28
3
4
5
6
7
8
9
BC847BW
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
4K7
1400
STL21
VDD_PNX_PAD
3409
22R
3474
n
0
0
1
4
1
4
2
4405
F1405
3420
4K7
3401
4K7
I415
I417
4K7
8
9
4
3
K
0
1
3413
I416
BLM31
5406
I403
I430
22R
3456
22R
3421
4K7
3477
+1V8
u
0
1
4
0
4
2
3417
4K7
22R
3471
I421
22R
3444
3412
4K7
I428
VDD_PNX_ANA
6
2
4
2
n
0
0
1
22R
3485
9
9
4
3
K
0
1
3419
4K7
22R
3464
9
3
4I
3460
22R
VDD_PNX_PLL
3484
22R
6
1
4
2
n
0
0
1
8
2
4
3
K
0
1
VDD_PNX_CORE
3496
F1421
22R
3436
33R
I424
F1401
22R
3454
VDD_PNX_PAD
3861
1K2
F1423
3478
22R
33R
3432
4K7
3423
8
0
4
4
2433
100n
I436
0
2
A
K
C
A-
OI
X
9
1
D
0
L
E
S-
OI
X
8
B
1
L
E
S-
OI
X
8
C
2
L
E
S-
OI
X
9
D
NI
-
L
A
T
X
9
F
A
T
U
O-
L
A
T
X
0
1
F
A
Y-CVBS
N1
F1415
2
1
C
A
4
P
D
D
V
3
1
C
A
VDDP5
P23
VDDP6
N23
VDDP7
M23
8
P
D
D
V
2
1
D
9
P
D
D
V
1
1
D
VREF
M1
VS-IN
F3
VS-OUT
T2
WE0
H25
WE1
J24
T
U
O-
2
1
0
S
W
6
1
D
A
4
1
E
A
T
U
O-
3
S
W
NI
-
E
S
W
1
1
E
A
NI
-
K
S
W
2
1
D
A
5
2
A-
OI
X
9
D
A
0
D
X
T
7
1
D
A
1
D
X
T
7
1
F
A
2
D
X
T
8
1
D
A
3
D
X
T
9
1
D
A
VDDC1
P4
VDDC2 R4
3
C
D
D
V
4
1
C
A
4
C
D
D
V
5
1
C
A
VDDC5
T23
VDDC6
R23
7
C
D
D
V
5
1
D
8
C
D
D
V
4
1
D
9
C
D
D
V
3
1
D
VDDP1
M4
VDDP2
N4
3
P
D
D
V
E25
SDRAM-DATA30
T26
SDRAM-DATA31
T24
SDRAM-DATA4
F23
SDRAM-DATA5
F25
SDRAM-DATA6
G23
SDRAM-DATA7
G25
SDRAM-DATA8
G26
SDRAM-DATA9
G24
T
U
O-
FI
D
P
S
6
1
E
A
NI
-
1
FI
D
P
S
3
1
F
A
NI
-
2
FI
D
P
S
3
1
E
A
N
T
E
S
E
R-
S
Y
S
0
1
D
A
K
C
T
8
D
A
I
D
T
9
C
A
S
M
T
8
E
A
T
S
R
T
C26
SDRAM-DATA16
T25
SDRAM-DATA17
U23
SDRAM-DATA18
U25
SDRAM-DATA19
V23
SDRAM-DATA2
D26
SDRAM-DATA20
V25
SDRAM-DATA21
W23
SDRAM-DATA22
W25
SDRAM-DATA23
Y26
SDRAM-DATA24
W26
SDRAM-DATA25
W24
SDRAM-DATA26
V26
SDRAM-DATA27
V24
SDRAM-DATA28
U26
SDRAM-DATA29
U24
SDRAM-DATA3
M25
SDRAM-ADDR2
R24
SDRAM-ADDR3
P26
SDRAM-ADDR4
P24
SDRAM-ADDR5
N25
SDRAM-ADDR6
M26
SDRAM-ADDR7
M24
SDRAM-ADDR8
L25
SDRAM-ADDR9
L23
SDRAM-DATA0
C25
SDRAM-DATA1
D24
SDRAM-DATA10
F26
SDRAM-DATA11
F24
SDRAM-DATA12
E26
SDRAM-DATA13
E24
SDRAM-DATA14
D25
SDRAM-DATA15
6
2
B
T
U
O-
0
D
S
6
1
F
A
T
U
O-
1
D
S
5
1
D
A
T
U
O-
2
D
S
5
1
E
A
T
U
O-
3
D
S
4
1
F
A
0
A
D
S
5
2
A
1
A
D
S
5
2
B
NI
-
E
D
S
1
1
F
A
NI
-
K
D
S
2
1
E
A
SDRAM-ADDR0
N26
SDRAM-ADDR1
P25
SDRAM-ADDR10
N24
SDRAM-ADDR11
L24
SDRAM-ADDR12
K23
SDRAM-ADDR13
L26
SDRAM-ADDR14
RAS0
J23
RAS1
J26
N
T
E
S
E
R
9
E
A
RP
K24
RSET
M2
2
S
T
R
8
1
F
A
3
S
T
R
9
1
F
A
0
D
X
R
7
1
C
A
1
D
X
R
7
1
E
A
2
D
X
R
8
1
C
A
3
D
X
R
9
1
C
A
T
U
O-
2
1
0
K
C
S
6
1
C
A
T
U
O-
3
K
C
S
4
1
D
A
NI
-
E
K
C
S
1
1
D
A
0
L
C
S
6
2
A
1
L
C
S
PROGC-OUT1
J2
PROGC-OUT2
J1
PROGC-OUT3
H4
PROGC-OUT4
H3
PROGC-OUT5
H2
PROGC-OUT6
H1
PROGC-OUT7
G1
PROGY-OUT0
J4
PROGY-OUT1
K1
PROGY-OUT2
K2
PROGY-OUT3
K3
PROGY-OUT4
K4
PROGY-OUT5
L1
PROGY-OUT6
L2
PROGY-OUT7
L3
R-CVBS
P3
1
F
A
8
2
OI
P
2
F
A
9
2
OI
P
3
F
A
PIO3
W4
0
3
OI
P
4
F
A
1
3
OI
P
5
F
A
PIO4
Y1
PIO5
Y2
PIO6
Y3
PIO7
Y4
PIO8
AA1
PIO9
AA2
T
U
O-
L
L
P
0
1
E
A
4
2
OI
O
P
3
E
A
PROG-OUT-CLK
L4
PROGC-OUT0
J3
2
1
OI
P
1
B
A
3
1
OI
P
2
B
A
4
1
OI
P
3
B
A
5
1
OI
P
1
C
A
6
1
OI
P
2
C
A
7
1
OI
P
3
C
A
8
1
OI
P
1
D
A
9
1
OI
P
2
D
A
PIO2
W3
0
2
OI
P
3
D
A
1
2
OI
P
4
D
A
2
2
OI
P
1
E
A
3
2
OI
P
2
E
A
5
2
OI
P
4
E
A
6
2
OI
P
5
E
A
7
2
OI
P
Q
E
R-I
C
P
3
2
A
A
Q
E
R-I
C
P
3
2
B
B
Q
E
R-I
C
P
3
2
C
R
R
E
S-I
C
P
4
1
C
P
O
T
S-I
C
P
5
1
A
Y
D
R
T-I
C
P
5
1
C
0-
0
T
S
C
P
8
C
A
1-
0
T
S
C
P
7
F
A
2-
0
T
S
C
P
7
E
A
0-
1
T
S
C
P
6
E
A
1-
1
T
S
C
P
6
D
A
2-
1
T
S
C
P
5
D
A
PIO0
W1
PIO1
W2
PIO10
AA3
1
1
OI
P
4
A
A
1
1
C
0
E
B
C-I
C
P
1
1
A
1
E
B
C-I
C
P
4
1
A
2
E
B
C-I
C
P
7
1
A
3
E
B
C-I
C
P
9
1
C
K
L
C-I
C
P
4
2
A
L
E
S
V
E
D-I
C
P
6
1
A
E
M
A
R
F-I
C
P
6
1
B
T
N
G-I
C
P
2
2
A
A
T
N
G-I
C
P
4
2
B
B
T
N
G-I
C
P
4
2
C
L
E
S
DI
-I
C
P
8
1
D
A
T
NI
-I
C
P
2
2
C
Y
D
RI
-I
C
P
6
1
C
R
A
P-I
C
P
4
1
B
R
R
E
P-I
C
P
5
1
B
8
1
B
3
2
D
A-I
C
P
9
1
A
4
2
D
A-I
C
P
9
1
B
5
2
D
A-I
C
P
0
2
C
6
2
D
A-I
C
P
0
2
B
7
2
D
A-I
C
P
1
2
A
8
2
D
A-I
C
P
0
2
D
9
2
D
A-I
C
P
1
2
C
3
D
A-I
C
P
9
C
0
3
D
A-I
C
P
1
2
B
1
3
D
A-I
C
P
2
2
B
4
D
A-I
C
P
0
1
A
5
D
A-I
C
P
0
1
B
6
D
A-I
C
P
0
1
C
7
D
A-I
C
P
0
1
D
8
D
A-I
C
P
1
1
B
9
D
A-I
C
P
5
B
0
D
A-I
C
P
8
A
1
D
A-I
C
P
9
A
0
1
D
A-I
C
P
2
1
A
1
1
D
A-I
C
P
2
1
B
2
1
D
A-I
C
P
2
1
C
3
1
D
A-I
C
P
3
1
A
4
1
D
A-I
C
P
3
1
B
5
1
D
A-I
C
P
3
1
C
6
1
D
A-I
C
P
6
1
D
7
1
D
A-I
C
P
7
1
C
8
1
D
A-I
C
P
7
1
B
9
1
D
A-I
C
P
8
1
A
2
D
A-I
C
P
9
B
0
2
D
A-I
C
P
7
1
D
1
2
D
A-I
C
P
8
1
C
2
2
D
A-I
C
P
A4
L-D6
B4
L-D7
C4
L-FSYNC
B1
L-SYNC
A2
L-VAL
C1
K
L
C-
X
M
5
A
0
D-
X
M
6
A
1
D-
X
M
6
B
2
D-
X
M
6
C
3
D-
X
M
7
A
4
D-
X
M
7
B
5
D-
X
M
7
C
6
D-
X
M
7
D
7
D-
X
M
8
D
C
N
Y
S-
X
M
5
C
L
A
V-
X
M
ITU-OUT-CLK
T4
ITU-OUT0
V1
ITU-OUT1
V2
ITU-OUT2
V3
ITU-OUT3
V4
ITU-OUT4
U1
ITU-OUT5
U2
ITU-OUT6
U3
ITU-OUT7
U4
L-CLK
A1
L-D0
B2
L-D1
C2
L-D2
A3
L-D3
B3
L-D4
C3
L-D5
5
2
B
A
Q
R
A
M
D-
E
DI
5
2
F
A
Y
D
R
OI
-
E
DI
5
2
C
A
IDUMP0
N2
IDUMP1
R1
ITU-IN-CLK
G2
ITU-IN-FID
G4
ITU-IN-VAL
G3
ITU-IN0
D3
ITU-IN1
D2
ITU-IN2
E2
ITU-IN3
D1
ITU-IN4
E3
ITU-IN5
E1
ITU-IN6
F4
ITU-IN7
F1
AF22
IDE-DD11
AD22
IDE-DD12
AE23
IDE-DD13
AF24
IDE-DD14
AD24
IDE-DD15
AB24
IDE-DD2
AD23
IDE-DD3
AF23
IDE-DD4
AE22
IDE-DD5
AD21
IDE-DD6
AF21
IDE-DD7
AF20
IDE-DD8
AE20
IDE-DD9
AE21
R
OI
D-
E
DI
5
2
D
A
W
OI
D-
E
DI
5
2
E
A
K
C
A
M
D-
E
DI
GND6
N12
GND7 P11
GND8 P12
GND9
R11
M
L
A
P-
K
C
T|
D
N
G
7
C
A
HS-IN
F2
HS-OUT
T3
HSCKB
K26
0
S
C-
E
DI
6
2
C
A
1
S
C-
E
DI
6
2
B
A
0
A
D-
E
DI
6
2
E
A
1
A
D-
E
DI
6
2
F
A
2
A
D-
E
DI
6
2
D
A
IDE-DD0
AC24
IDE-DD1
AE24
IDE-DD10
GND39
D23
GND4 M11
0
4
D
N
G
2
2
D
1
4
D
N
G
1
2
D
2
4
D
N
G
4
1
N
3
4
D
N
G
4
1
M
4
4
D
N
G
5
1
L
5
4
D
N
G
4
1
L
6
4
D
N
G
3
1
N
7
4
D
N
G
3
1
M
8
4
D
N
G
2
1
M
9
4
D
N
G
3
1
L
GND5 N11
0
5
D
N
G
2
1
L
1
5
D
N
G
6
D
2
5
D
N
G
5
D
4
2
D
N
G
5
1
T
5
2
D
N
G
1
2
C
A
6
2
D
N
G
2
2
C
A
GND27
AC23
GND28
AB23
GND29
T16
GND3
L11
GND30
R16
GND31
P16
GND32
P15
GND33
N16
GND34
N15
GND35
M16
GND36
M15
GND37
L16
GND38
E23
GND1 D4
GND10 R12
GND11 T11
GND12
AB4
GND13 AC4
4
1
D
N
G
5
C
A
5
1
D
N
G
6
C
A
6
1
D
N
G
3
1
P
7
1
D
N
G
3
1
R
8
1
D
N
G
2
1
T
9
1
D
N
G
3
1
T
GND2 E4
0
2
D
N
G
4
1
P
1
2
D
N
G
4
1
R
2
2
D
N
G
5
1
R
3
2
D
N
G
4
1
T
2
S
T
C
8
1
E
A
3
S
T
C
9
1
E
A
CVBS
P2
3
D
C
D
0
2
C
A
DQM0
H23
DQM1
H24
DQM2
R26
DQM3
R25
K
L
C-
U
S
D
7
D
A
0
C
P
T-
U
S
D
8
F
A
1
C
P
T-
U
S
D
6
F
A
3
R
T
D
0
2
D
A
T
U
O-
2
1
0
K
L
C
S
F
5
1
F
A
T
U
O-
3
K
L
C
S
F
3
1
D
A
NI
-
E
K
L
C
S
F
2
1
F
A
G
R2
AVDD0
M3
AVDD1
P1
AVDD2
R3
K
L
C-
S
S
V
A
0
1
C
A
B
T1
BE-BCLK
AA23
BE-DATI
AA26
BE-DATO
Y25
BE-FLAG
AA24
BE-SYNC
AA25
BE-V4
Y23
BE-WCLK
Y24
C-CVBS
N3
CAS0
H26
CAS1
J25
CKE
K25
PNX7100EH/G/C3
7400
K
L
C-
D
D
V
A
1
1
C
A
4K7
3410
22R
3480
22R
I414
3463
3855
22R
I435
I405
2
0
4
4
3468
22R
1K2
3433
3422
4K7
3443
22R
n
0
0
1
2
2
4
2
3839
10K
33R
3431
100n
2432
CHRYSALIS
22R
3462
3435
15R
3453
22R
7
K
4
2
2
8
3
3445
22R
4K7
3400
7
K
4
6
2
8
3
9
0
4
4
7
0
4
4
3415
4K7
33R
3440
3491
22R
F1407
K
0
0
1
7
9
4
3
22R
I402
3481
22R
3492
3473
22R
F402
I437
n
0
0
1
5
1
4
2
3414
4K7
I423
3829
4K7
4M0
2
1
4
3
FXO-34FL
7402
K
0
1
1
5
8
3
F1417
3854
22R
3465
3837
10K
22R
1
2
4
2
n
0
0
1
3466
22R
4K7
3828
22R
3856
3832
4K7
0
1
4
4
3447
22R
3458
22R
3
K
3
6
0
4
3
F403
4
2
4
2
n
0
0
1
4K7
3831
I406
VDD_PNX_CORE
22R
3493
8
3
4I
22R
3469
F401
3489
22R
2401
100p
8
0
4I
F406
I422
22R
3479
3455
22R
VDD_PNX_CORE
BLM31
5405
VDD_PNX_ANA
4K7
0
1
4
2
n
0
0
1
3416
1
1
4
4
1401
4M
HC-49/S
n
0
0
1
6
0
4
2
I418
n
0
0
1
2
1
4
2
5
2
4
3
K
0
1
10K
3838
n
0
0
1
9
0
4
2
22R
3488
3860
33R
3486
22R
22R
3457
22R
3467
8
0
4
3
3
K
3
3461
22R
7
2
4
3
K
0
1
100p
2400
F404
3853
22R
n
0
0
1
9
1
4
2
VDD_PNX_CORE
F1425
10
19
20
I431
8
9
18
17
16
15
14
13
12
11
1
74LVC245APW
7401
2
3
4
5
6
7
22R
3494
+3V3
3835
4K7
9
2
4
2
n
0
0
1
7
K
4
5
2
8
3
3482
22R
3495
7
K
4
4
2
8
3
22R
0
5
8
3
K
0
1
22R
3487
+3V3
I429
I433
BLMP18P
5400
n
0
0
1
5
0
4
2
F1413
3475
22R
5402
F1403
BLM31
3840
F1411
22R
33R
3603
u
0
1
0
2
4
2
3402
4K7
I420
I427
7
K
4
3
2
8
3
F1419
3430
33R
F400
VDD_PNX_PAD
3
1
4
2
n
0
0
1
4K7
I413
F405
3404
VDD_PNX_PAD
I425
3863
4K7
5403
VDD_PNX_PAD
BLM18P
PNX7100_ITU_OUT_CLK
IDE1_DD(15:0)
CbCr(0:7)
n
E
O
_
E
K
L
C
S
F
_
C
D
A
_
5
2
OI
P
M
Q
RI
_
2
E
DI
_
4
OI
P
M
T
U
O
_
3
S
W
T
U
O
_
3
K
C
S
T
U
O
_
3
K
L
C
S
F
T
U
O
_
2
D
S
T
U
O
_
1
D
S
T
U
O
_
3
D
S
+3V3_7402
RTS1
UART1
MX_D_CTL
n
E
_
1
E
DI
_
2
2
OI
P
M
Y(0:7)
SDRAM_DATA(7)
SDRAM_DATA(5)
SDRAM_DATA(3)
SDRAM_DATA(1)
SDRAM_ADDR(13)
SDRAM_ADDR(11)
SDRAM_ADDR(9)
SDRAM_ADDR(7)
SDRAM_ADDR(5)
SDRAM_ADDR(3)
0
S
T
C
1
S
T
C
Q
RI
_
1
E
DI
n
E
_
M
O
R
P
E
E
_
9
1
OI
P
M
RAS(0)
DQM(2)
DQM(0)
SDRAM_DATA(31)
SDRAM_DATA(29)
SDRAM_DATA(27)
SDRAM_DATA(25)
SDRAM_DATA(23)
SDRAM_DATA(21)
SDRAM_DATA(19)
SDRAM_DATA(17)
SDRAM_DATA(15)
SDRAM_DATA(13)
SDRAM_DATA(11)
SDRAM_DATA(9)
PNX7100_VS_OUT
Y(0)
Y(1)
Y(2)
Y(3)
Y(4)
Y(5)
Y(6)
4
OI
P
M
ITU_OUT(2)
)
7(
T
U
O
_
U
TI
)
5(
T
U
O
_
U
TI
ITU_OUT(1)
)
4(
T
U
O
_
U
TI
ITU_OUT(3)
ITU_OUT(0)
ITU_OUT(1)
ITU_OUT(2)
ITU_OUT(3)
ITU_OUT(4)
ITU_OUT(5)
ITU_OUT(6)
ITU_OUT(7)
ITU_OUT(7:0)
PNX7100_HS_OUT
)
1(
0
T
S
C
P
_
0
0
1
7
X
N
P
)
2(
0
T
S
C
P
_
0
0
1
7
X
N
P
)
0(
1
T
S
C
P
_
0
0
1
7
X
N
P
)
2(
1
T
S
C
P
_
0
0
1
7
X
N
P
K
C
T
_
0
0
1
7
X
N
P
I
D
T
_
0
0
1
7
X
N
P
S
M
T
_
0
0
1
7
X
N
P
)
1(
1
T
S
C
P
_
0
0
1
7
X
N
P
T
S
R
T
_
0
0
1
7
X
N
P
n
T
E
S
E
R
_
S
Y
S
_
0
0
1
7
X
N
P
X
N
P
_
NI
_
E
K
L
C
S
F
T
U
O
_
L
L
P
+3V3_7402
T
U
O
_
L
A
T
X
_
0
0
1
7
X
N
P
NI
_
L
A
T
X
_
0
0
1
7
X
N
P
P_CLK
IDE1_DD(7)
MPIO4_IDE2_IRQ
+3V3
T
E
S
E
R
_
A
N
A
_
1
3
OI
P
M
K
L
C
_
U
S
D
_
0
0
1
7
X
N
P
0
C
P
T
_
U
S
D
_
O
D
T
_
0
0
1
7
X
N
P
1
C
P
T
_
U
S
D
_
0
0
1
7
X
N
P
)
0(
0
T
S
C
P
_
0
0
1
7
X
N
P
PCI_GNTB
n
Q
RI
_
A
N
A
_
1
OI
P
M
n
Q
RI
_
4
9
3
1
_
2
OI
P
M
PCI_IRDY
PCI_PERR
PCI_SERR
PCI_STOP
PCI_GNT
PCI_INTA
PCI_REQ
PCI_REQA
PCI_GNTA
PCI_REQB
n
T
E
S
E
R
_
2
E
DI
_
8
1
OI
P
M
PNX7100_TCK
PCI_CBE(0)
PCI_PAR
PCI_TRDY
PCI_IDSEL
PCI_CBE(1)
PCI_CBE(2)
PCI_CBE(3)
PCI_DEVSEL
PCI_FRAME
n
T
E
S
E
R
_I
M
D
H
_
1
1
OI
P
M
SDRAM_CTRL
ITU_OUT(2)
ITU_OUT(1)
ITU_OUT(4)
ITU_OUT(3)
ITU_OUT(6)
ITU_OUT(5)
ITU_OUT(0)
ITU_OUT(7)
OI
D
U
A
_
L
A
TI
GI
D
MPIO9_BOARD_ID_0
VIDEO_OUT
SDRAM_ADDR(0)
n
E
O
_
2
1
0
K
L
C
S
W
F
_
C
D
A
_
6
2
OI
P
M
D
E
L
_
4
9
3
1
_
3
2
OI
P
M
N
W
O
D
R
E
W
O
P
_
4
9
3
1
_
1
2
OI
P
M
n
T
E
S
E
R
_
PI
V
_
0
2
OI
P
M
N
O
_
D
H
_
7
1
OI
P
M
n
T
E
S
E
R
_
N
A
C
S
G
O
R
P
_
6
1
OI
P
M
n
T
E
S
E
R
_
M
T
T
D
_
5
1
OI
P
M
n
T
E
S
E
R
_
4
9
3
1
E
E
EI
_
4
1
OI
P
M
n
T
E
S
E
R
_
1
E
DI
_
3
1
OI
P
M
Q
RI
_I
M
D
H
_
2
1
OI
P
M
SDRAM_DATA(20)
SDRAM_DATA(22)
SDRAM_DATA(24)
SDRAM_DATA(30)
IIC1
0
L
C
S
1
A
D
S
1
L
C
S
0
A
D
S
SDRAM_ADDR(10)
SDRAM_ADDR(14:0)
SDRAM_ADDR(8)
SDRAM_ADDR(6)
SDRAM_ADDR(4)
SDRAM_ADDR(2)
SDRAM_ADDR(1)
MPIO5_VIP_ERROR
RXD1
TXD1
CAS(0)
DQM(1)
DQM(3)
WE(0)
CKE
HSCKB
SDRAM_ADDR(12)
SDRAM_ADDR(14)
SDRAM_DATA(6)
SDRAM_DATA(8)
SDRAM_DATA(10)
NI
_
X
A
O
C
_
FI
D
P
S
NI
_
T
P
O
_
FI
D
P
S
T
U
O
_
FI
D
P
S
T
U
O
_
2
1
0
S
W
T
U
O
_
2
1
0
K
C
S
T
U
O
_
2
1
0
K
L
C
S
F
T
U
O
_
3
D
S
T
U
O
_
2
D
S
T
U
O
_
1
D
S
T
U
O
_
0
D
S
T
U
O
_
3
S
W
T
U
O
_
3
K
C
S
T
U
O
_
3
K
L
C
S
F
NI
_
E
D
S
NI
_
E
S
W
NI
_
E
K
C
S
MPIO19_EEPROM_En
5
2
A
_
OI
X
2
L
E
S
_
OI
X
K
C
A
_
OI
X
1
L
E
S
_
OI
X
0
L
E
S
_
OI
X
R
A
P
_I
C
P
)
4
2(
D
A
_I
C
P
)
5
2(
D
A
_I
C
P
)
6
2(
D
A
_I
C
P
)
7
2(
D
A
_I
C
P
)
8
2(
D
A
_I
C
P
)
9
2(
D
A
_I
C
P
)
0
3(
D
A
_I
C
P
)
1
3(
D
A
_I
C
P
PCI_AD(31:0)
RTS0
CTS1
IDE1_IRQ
CTS0
)
9(
D
A
_I
C
P
)
0
1(
D
A
_I
C
P
)
1
1(
D
A
_I
C
P
)
2
1(
D
A
_I
C
P
)
3
1(
D
A
_I
C
P
)
4
1(
D
A
_I
C
P
)
5
1(
D
A
_I
C
P
)
6
1(
D
A
_I
C
P
)
7
1(
D
A
_I
C
P
)
8
1(
D
A
_I
C
P
)
9
1(
D
A
_I
C
P
)
0
2(
D
A
_I
C
P
)
1
2(
D
A
_I
C
P
)
2
2(
D
A
_I
C
P
)
3
2(
D
A
_I
C
P
)
4(
D
_
X
M
)
5(
D
_
X
M
)
6(
D
_
X
M
)
7(
D
_
X
M
MX_D(7:0)
)
0(
D
A
_I
C
P
)
1(
D
A
_I
C
P
)
2(
D
A
_I
C
P
)
3(
D
A
_I
C
P
)
4(
D
A
_I
C
P
)
5(
D
A
_I
C
P
)
6(
D
A
_I
C
P
)
7(
D
A
_I
C
P
)
8(
D
A
_I
C
P
L_D(1)
L_D(2)
L_D(3)
L_D(4)
L_D(5)
L_D(6)
L_D(7)
L_D(7:0)
)
0(
D
_
X
M
)
1(
D
_
X
M
)
2(
D
_
X
M
)
3(
D
_
X
M
CbCr(2)
CbCr(3)
CbCr(4)
CbCr(5)
CbCr(6)
CbCr(7)
Y(7)
ITU_OUT(0)
)
6(
T
U
O
_
U
TI
ITU_IN(0)
ITU_IN(1)
ITU_IN(2)
ITU_IN(3)
ITU_IN(4)
ITU_IN(5)
ITU_IN(6)
ITU_IN(7)
ITU_IN(7:0)
L_D(0)
IDE1_DD(5)
IDE1_DD(4)
IDE1_DD(3)
IDE1_DD(2)
IDE1_DD(1)
IDE1_DD(0)
SDRAM_DATA(28)
SDRAM_DATA(26)
SDRAM_DATA(18)
SDRAM_DATA(16)
SDRAM_DATA(14)
SDRAM_DATA(12)
SDRAM_DATA(4)
SDRAM_DATA(2)
SDRAM_DATA(0)
SDRAM_DATA(31:0)
CbCr(0)
CbCr(1)
P
O
T
S
_I
C
P
R
R
E
S
_I
C
P
R
R
E
P
_I
C
P
Y
D
RI
_I
C
P
Y
D
R
T
_I
C
P
E
M
A
R
F
_I
C
P
L
E
S
V
E
D
_I
C
P
)
3(
E
B
C
_I
C
P
)
2(
E
B
C
_I
C
P
)
1(
E
B
C
_I
C
P
)
0(
E
B
C
_I
C
P
PCI_CON
IDE1_DD(15)
IDE1_DD(14)
IDE1_DD(13)
IDE1_DD(12)
IDE1_DD(11)
IDE1_DD(10)
IDE1_DD(9)
IDE1_DD(8)
IDE1_DD(6)
BE_WCLK
BE_V4
BE_SYNC
BE_FLAG
BE_DATA_WR
BE_DATA_RD
BE_BCLK
BE_DATA
0
L
C
S
0
A
D
S
IIC0
1
A
D
S
1
L
C
S
B
T
N
G
_I
C
P
B
Q
E
R
_I
C
P
A
T
N
G
_I
C
P
A
Q
E
R
_I
C
P
Q
E
R
_I
C
P
A
T
NI
_I
C
P
T
N
G
_I
C
P
0
A
D
_
1
E
DI
n
1
S
C
_
1
E
DI
n
0
S
C
_
1
E
DI
IDE_CTL
RXD0
TXD0
CTS2
RTS2
RXD2
TXD2
CTS3
TXD3
RXD3
RTS3
T
U
O
_
C
T
U
O
_
Y
T
U
O
_
R
T
U
O
_
B
T
U
O
_
G
UART0
L
E
S
DI
_I
C
P
1
A
D
_
1
E
DI
2
A
D
_
1
E
DI
n
W
OI
D
_
1
E
DI
n
R
OI
D
_
1
E
DI
Y
D
R
OI
_
1
E
DI
n
K
C
A
M
D
_
1
E
DI
Q
R
A
M
D
_
1
E
DI
L_FSYNC
L_SYNC
L_VAL
L_CLK
L_D_CTL
MX_VAL
MX_SYNC
MX_CLK
T
U
O
_
S
B
V
C
MPIO6_BE_DLOAD
MPIO10_BOARD_ID_1
PNX7100_ITU_IN_VAL
PNX7100_ITU_IN_FID
PNX7100_ITU_IN_CLK
PNX7100_HS_IN
EJTAG_RESETn
PNX7100_TRST
PNX7100_VS_IN
n
T
E
S
E
R
_
0
0
1
7
X
N
P
MPIO8_1394_CNA
MPIO7_MUTE_LVn
PNX7100_PCST1(2)
PNX7100_PCST1(1)
PNX7100_PCST1(0)
PNX7100_DSU_TPC1
PNX7100_DSU_CLK
PNX7100_PCST0(2)
PNX7100_PCST0(1)
PNX7100_PCST0(0)
PNX7100_TDO_DSU_TPC0
PNX7100_TMS
PNX7100_TDI
3103_603_30601_a2_sh130_sh4.pdf 2004-12-01