EN 169
3139 785 31532
9.
Circuit- and IC description
A matrix switch STV6618D [7408] controlled by the Slave
μ
P via I
2
C-bus is used for Video I/O switching. All used
outputs excluding pin 21 (Y/CVBSOUT-REC) have a 6dB-
ampli
fi
cation and a 75 ohms-driver-stage inside. This IC also
includes several digital outputs, which are used for switching
purposes on the Analog board.
This matrix switch routes the selected inputs to the correct
output lines for TV viewing and further processing in the
Digital board.
The record selector inside the switch selects between the
inputs from Tuner Frontend (VFV), CVBS Scart1 (CVBSIN1),
CVBS Scart2 (CVBSIN2) or D_CVBS from the DENC (on
Digital board). The output signal CVBS_REC together with
the other signals CVBSFIN, YFIN & C_FIN from the Front
and RCB from Scart2 are routed directly to the VIP (on Digital
board) for further processing.
The signals D_CVBS and D_Y are fed through NJM2267M
[7203] (6dB ampli
fi
cation) and D_C via transistors [7410 &
7411] as driver to the rear S-Video output socket and CVBS
cinch socket.
9.4. Basic
Engine
The VAD8043 module (also known as D4.3 drive) is dual
format DVD-R/+R and DVD-RW/+RW drive video recorder
with an E-IDE/ATAPI interface.
The video recorder engine performs all basic servo tasks.
It reads data from and writes data to the disc and controls
all functions like tray control, start/stop the disc, tracking,
jumping and communicating with the host.
Mechanically, the module consists of a motorized tray
loader that contains the dual laser optical pickup unit and a
PCBA that contains all the electronics needed to control the
drive and interfacing the MPEG encoder/decoder back-end
application.
There is a temperature sensor included in the drive that
prevents malfunction or destruction of the drive in case the
temperature inside the drive gets too high.
9.5. Digital
Board
The Digital Board is based on the highly integrated Chrysalis
BGA chip (Ball Grid Array), PNX7100EH and supports 2 IDE
(ATAPI) connection.
The board encodes and multiplexes the analogue video and
digital uncompressed audio (I
2
S) into an MPEG2 stream. This
MPEG2 stream is formatted for recording by the DVD+RW
engine. In the playback, the board will decode the MPEG2
video into analogue video. In addition, a DV stream can be
received via IEEE 1394 (i-Link), and transformed to MPEG2
format.
SDRAM
4M X 16 x 4
I2C
EEPROM
64Kbit
VIP
SAA7118E
1394
PID1394P25
I2C
EEPROM
64Kbit
CHRYSALIS
PNX7100EH
7400
1FH VIDEO
OUT
(2)
DIG. AUDIO IN
OPT. & COAX
DIG. AUDIO OUT
I2S AUDIO OUT
I2S AUDIO IN
1FH VIDEO IN
(1)
I2C 0
I2C 1
7007
I2C0
CCIR656
CLOCK
7200
1204
7201
-5V
FROM POWER SUPPLY
5V
12V
3V3
XIO_1
XIO_0
1394
PID1394L40
1394
CONNECTOR
FLASH
4M X 16
7812/7813
7807
7809
7810
(1) analogue CVBS, YC, RGB/YUV
(2) analogue CVBS, YC, RGB/YUV
OPTIONAL
TO / FROM
HDD
TO / FROM
D4.3 DRIVE (BE)
IDE1
IDE2
Figure 9-4 Block Diagram of Chrysalis Board
9.5.1. Record
Mode