106
C.3
Standard Event Status Register
The Standard Event Status Register is used to record general system event
conditions for the status reporting system. The register is bit mapped,
meaning that each condition is represented by a bit. When a bit is set (has a
value of 1), then the condition is true. The bit remains set until cleared by the
*ESR? query or the *CLS command.
The Standard Event Enable Register is used to define the conditions that will
set the Event Status Byte bit (bit 5) in the Status Byte. If a bit is set in the
Standard Event Status register and its corresponding bit is set in the Standard
Event Enable Register, then the Event Status Byte bit (bit 5) in the Standard
Event Register will be set.The Standard Event Enable Register is configured by
using the *ESE common command.
Each of the bits in the Standard Event Status Register is described below.
Standard Event Status Register
bit 7: Power On Not used by the 2835-C.
bit 6: User Request Not used by the 2835-C.
bit 5: Command Error
A 1 in this bit indicates that the 2835-C has received a remote command
that generated a command error.
bit 4: Execution Error
A 1 in this bit indicates that the 2835-C has received a remote command
that generated an execution error.
bit 3: Device Error
A 1 in this bit indicates that an unmasked device error has occurred.
bit 2: Query Error
A 1 in this bit indicates that a query error has occurred.
bit 1: Request Control. This bit is always 0.
bit 0: Operation Complete
This bit is controlled by the *OPC command. If the *OPC command is in
effect, then this bit will be set to 1 when all pending operations have
completed. To operate correctly, this bit should be cleared by the *CLS
command or *ESR? query before the *OPC command is issued again.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
