CHAPTER 5 CLOCK GENERATOR
User’s Manual U16899EJ2V0UD
119
Caution When using the high-speed system clock oscillator and subsystem clock oscillator, wire as
follows in the area enclosed by the broken lines in the Figures 5-8 and 5-9 to avoid an adverse
effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as V
SS
. Do not
ground the capacitor to a ground pattern through which a high current flows.
• Do not fetch signals from the oscillator.
Note that the subsystem clock oscillator is designed as a low-amplitude circuit for reducing
power consumption.
Figure 5-10 shows examples of incorrect resonator connection.
Figure 5-10. Examples of Incorrect Resonator Connection (1/2)
(a) Too long wiring
(b) Crossed signal line
X2
V
SS
X1
X1
V
SS
X2
PORT
Remark When using the subsystem clock, replace X1 and X2 with XT1 and XT2, respectively. Also, insert
resistors in series on the XT2 side.
