797
FX
3U
/FX
3UC
Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
35 Interrupt Function and Pulse Catch Function
35.6 Counter Interrupt - Interrupt Triggered by Counting Up of High Speed Counter
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35.6
Counter Interrupt - Interrupt Triggered by Counting Up of High Speed
Counter
1. Outline
This type of interrupt utilizes the current value of a high speed counter.
2. Application
This type of interrupt is used together with the comparison set instruction DHSCS (FNC 53). When the
current value of a high speed counter reaches the specified value, an interrupt routine is executed.
3. Basic program (programming procedure)
*1.
When the comparison value specified by a data register, etc. is changed, the current value is actually
changed to the specified value when END instruction is executed.
4. Number and operation of (six) timer interrupt pointers
*1.
Cleared when the PLC mode is changed from RUN to STOP.
5. When setting an interrupt output (Y or M) to ON or OFF using a high speed counter
When only controlling the ON/OFF status of an output relay (Y) or auxiliary relay (M) according to the current
value of a high speed counter, a required program can be easily created using DHSCS (FNC 53), DHSCR
(FNC 54) or DHSZ (FNC 55) instruction.
Pointer No.
Interrupt disable flag
I010
M8059
*1
I020
I030
I040
I050
I060
M8000
RUN
monitor
FNC 04
EI
FNC 53
DHSCS
K1000 C255
FNC 03
IRET
END
Step
0
C255
I010
Interrupt pointer
number is
specified
FNC 06
FEND
Interrupt routine
(interrupt program)
I010
Interrupt
pointer
When counter interrupt is specified
Interrupt return
K2,147,483,647
*1
Main program
Interrupts are enabled after EI (FNC 04)
instruction.
The main program is described.
The coil of a high speed counter is driven, and
an interrupt pointer is specified in DHSCS (FNC
53) instruction.
When the current value of C255 changes from
"999" to "1000", the interrupt routine is executed.
For an interrupt routine use example, refer to the
input interrupt function described in the
preceding paragraph.
I 0
0
Counter interrupt pointer (1 to 6)