Mitsubishi Electric Apricot LS Pro, Hardware Technical Reference

Page: 75 / 142

Chapter 4
Chapter 6
Chapter 4
Peripheral items
Appendix A
Appendix C
Pr
eface
Chapter 4
LS PRO HARDWARE TECHNICAL REFERENCE 4/15
IDE interface
Interface signal Host reset
descriptions
Reset signal from the system board. Active low during system power up.
Host data 0-15
16-bit bidirectional data bus between the system board and the drive.
Host I/O channel ready
These two lines allow the drive to lengthen I/O read and write cycles by generating
system board wait states. These lines are normally high and are driven low by the drive
if an I/O cycle is to be lengthened.
Host IOW
Write strobe. This signal clocks data from the system board to the drive on the data
bus.
Host IOR
Read strobe. This signal clocks data from the drive to the system board on the data bus.
Host ALE
System board Address Latch Enable. This signal is not used by the drive, it is provided
for compatibility.
Host IRQ14
This is the interrupt signal to the system board. This signal is active high when the drive
is selected and the drive interrupt enable bit (IEN) is activated by the system board. An
interrupt is cleared upon receiving the next command, when the status register is read,
or when the drive is reset.
Host IOCS16
Informs the system board that the drive data register has been enabled and the drive
is prepared to perform a 16-bit I/O transfer.
Host ADDR 0-2
These lines are used to select registers on the drive.