MAX32660 User Guide
Maxim Integrated
Page 55 of 195
Flash Controller Clock Divisor Register
FLC_CLKDIV
[0x04]
Bits
Name
Access
Reset
Description
7:0
clkdiv
R/W
0x60
Flash Controller Clock Divisor
The system clock is divided by the value in this field to generate the FLC peripheral
clock,
f
FLC_CLK
. The FLC peripheral clock must equal 1MHz. The default on all forms of
reset is 96 (0x60), resulting in
f
FLC_CLK
= 1MHz. If the OVR is changed, this field must be
updated to match the divisor for the HFIO oscillator to achieve
f
FLC_CLK
= 1MHz.
Table 5-5. Flash Controller Control Register
Flash Controller Control Register
FLC_CTRL
[0x08]
Bits
Name
Access
Reset
Description
31:28
unlock_code
R/W
0
Flash Unlock
Write the unlock code, 0x2, prior to any flash write or erase operation to unlock the
flash. Writing any other value to this field locks the internal flash.
0x2: flash unlock code
27:26
-
RO
-
Reserved for Future Use
Do not modify this field.
25
lve
R/W
1
Low Voltage Enable
Set this field to 1 to enable low voltage operation for the flash memory. Refer to
section
Core Operating Voltage Range Selection
for detailed usage information on
this setting.
0: Low voltage operation disabled (Default).
1: Low voltage operation enabled.
Note: The
.ovr field must be set to 0b00 prior to setting this field to
1.
24
busy
RO
0
Flash Busy Flag
When this field is set, writes to all flash registers are ignored except for the
register.
0: flash idle
1: flash busy
Note: If the Flash Controller is busy (
.busy = 1), reads, writes and erase
operations are not allowed and result in an access failure (
.access_fail = 1).
23:16
-
RO
0
Reserved for Future Use
Do not modify this field.
15:8
erase_code
R/W
0
Erase Code
Prior to an erase operation this field must be set to 0x55 for a page erase or 0xAA for a
mass erase. The flash must be unlocked prior to setting the erase code.
This field is automatically cleared after the erase operation is complete.
0x00: Erase disabled.
0x55: Page erase code.
0xAA: Enable mass erase via the JTAG debug port.
7:5
-
R/W
0
Reserved for Future Use
Do not modify this field.
4
width
R/W
0
Data Width Select
This field sets the data width of a write to the flash page. The Flash Controller supports
either 32-bit wide writes or 128-bit wide writes.
0: 128-bit transactions (
1: 32-bit transactions (
only)
