Lattice Semiconductor sysCLOCK ECP5, Usage Manual

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ECP5 and ECP5-5G sysCLOCK
PLL/DLL Design and Usage Guide
DCSMODE Attribute
Table 5 provides the behavior of the DCS output based on the setting of the DCSMODE attribute when the pin
MODESEL =’0’. The MODESEL pin is dynamic and can toggle during operation. Table 5 is only valid when MODE-
SEL =’0’.
Table 5. DCSC – DCSMODE Attribute Table when MODESEL=’0’
DCSC Usage in VHDL
Component Instantiation
Library lattice;
use lattice.components.all;
Component and Attribute Declaration
COMPONENT DCSC
GENERIC(DCSMODE : string := “POS”);
PORT (CLK0 :IN STD_LOGIC;
CLK1 :IN STD_LOGIC;
SEL :IN STD_LOGIC_VECTOR(1 downto 0);
MODESEL :IN STD_LOGIC;
DCSOUT :OUT STD_LOGIC);
END COMPONENT;
DCSC Instantiation
attribute DCSMODE : string;
attribute DCSMODE of DCSinst0 : label is "POS";
I1: DCSC
generic map(
DCSMODE => “POS”)
port map (
CLK0 => CLK0
,CLK1 => CLK1
,SEL => SEL
,MODESEL => MODESEL
,DCSOUT => DCSOUT);
Attribute Name Description
SEL[1:0]
Attribute
Value 2’b01 2’b10 2’b00/2’b11
DCSMODE Attributes Falling Edge Triggered Clk0 Clk1 0 NEG
Rising Edge Triggered Clk0 Clk1 1 POS
Disabled Output is Low, Clk0 Clk0 0 0 CLK0_LOW
Disabled Output is High, Clk0 Clk0 1 1 CLK0_HIGH
Disabled Output is Low, Clk0 0 Clk1 0 CLK1_LOW
Disabled Output is High, Clk0 1 Clk1 1 CLK1_HIGH
Clk0 Buffered Clk0 Clk0 Clk0 CLK0
Clk1 Buffered Clk1 Clk1 Clk1 CLK1
Tie Low 0 0 0 LOW
Tie High 1 1 1 HIGH
MODESEL= “1” Non-Glitchless Clk0 Clk1 0 -