LAPIS Semiconductor ML610471, User Manual, Page: 89 / 281

ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 6 Clock Generation Circuit
6-7
6.3.2 High-speed clock
The high-speed clock is supplied from the 500kHz RC oscillator circuit.
6.3.2.1 High-Speed Clock Circuit
After the oscillation is enabled (ENOSC set to "1"), the high-speed clock (OSCLK) supply starts in 16 counts of the RC
oscillation clock.
Figure 6-4 shows the high-speed clock circuit configuration.
Figure 6-4 High-Speed Clock Circuit Configuration
Note:
•After the system reset mode is cleared, the OSCLK becomes the oscillation stopped state because the initial ENOSC
value is "0". In the oscillation enabled (ENOSC set to "1") state, the OSCLK supply starts in 16 counts after the stop
mode is released.
STOP mode
ENOSC (Enable Oscillation)
OSCLK (High-speed oscillation clock)
V
DDL
RC Oscillator
Circuits
16 counts