LAPIS Semiconductor ML610471, User Manual, Page: 195 / 281

ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 15 Port 4
15-7
Setting of P45 pin
When output mode is selected (P45DIR
bit = “0”) When input mode is selected (P45DIR bit =
“1”)
P45C1 P45C0 Description
0 0 High-impedance output (initial value) High-impedance input
0 1 P-channel open drain output Input with a pull-down resistor
1 0 N-channel open drain output Input with a pull-up resistor
1 1 CMOS output High-impedance input
Setting of P44 pin
When output mode is selected (P44DIR
bit = “0”) When input mode is selected (P44DIR bit =
“1”)
P44C1 P44C0 Description
0 0 High-impedance output (initial value) High-impedance input
0 1 P-channel open drain output Input with a pull-down resistor
1 0 N-channel open drain output Input with a pull-up resistor
1 1 CMOS output High-impedance input
Setting of P43 pin
When output mode is selected (P43DIR
bit = “0”) When input mode is selected (P43DIR bit =
“1”)
P43C1 P43C0 Description
0 0 High-impedance output (initial value) High-impedance input
0 1 P-channel open drain output Input with a pull-down resistor
1 0 N-channel open drain output Input with a pull-up resistor
1 1 CMOS output High-impedance input
Setting of P42 pin
When output mode is selected (P42DIR
bit = “0”) When input mode is selected (P42DIR bit =
“1”)
P42C1 P42C0 Description
0 0 High-impedance output (initial value) High-impedance input
0 1 P-channel open drain output Input with a pull-down resistor
1 0 N-channel open drain output Input with a pull-up resistor
1 1 CMOS output High-impedance input
Note:
In 48-pin plastic TQFP, P42 pin is not available. Please set P42C0 and P42C1 bits to “1”.