LAPIS Semiconductor ML610471, User Manual, Page: 169 / 281

ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 12 Port 0
12-5
12.2.4 External Interrupt Control Registers 0, 1 (EXICON0, EXICON1)
Address: 0F020H
Access: R/W
Access size: 8-bit
Initial value: 00H
7 6 5 4 3 2 1 0
EXICON0
⎯ ⎯ ⎯ ⎯
P03E0 P02E0 P01E0 P00E0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
Address: 0F021H
Access: R/W
Access size: 8-bit
Initial value: 00H
7 6 5 4 3 2 1 0
EXICON1
⎯ ⎯ ⎯ ⎯
P03E1 P02E1 P01E1 P00E1
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
EXICON0 and EXICON1 are special function registers (SFRs) to select an interrupt edge of Port 0.
[Description of Bits]
•
P03E0 to P00E0 , P03E1 to P00E1 (bits 3 to 0)
The P03E0 to P00E0 bits and the P03E1 to P00E1 bits are used to select interrupt disabled mode, falling-edge
interrupt mode, rising-edge interrupt mode, or both-edge interrupt mode. The P0nE0 bit and the P0nE1 bit
determine the interrupt mode of P0n (Example: When P02E0 = “0” and P02E1 = “1”, P02 is in rising-edge
interrupt mode).
P03E1-P00E1 P03E0-P00E0 Description
0 0 Interrupt disabled (initial value)
0 1 Falling-edge interrupt mode
1 0 Rising-edge interrupt mode
1 1 Both-edge interrupt mode