LAPIS Semiconductor ML610471, User Manual, Page: 202 / 281

ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 16 Port 6
16-3
16.2.2 Port 6 Data Register (P6D)
Address: 0F230H
Access: R/W
Access size: 8-bit
Initial value: 0FFH
7 6 5 4 3 2 1 0
P6D
P67D P66D P65D P64D P63D P62D P61D P60D
R/W R/W(*) R/W(*) R/W(*) R/W(*) R/W R/W R/W R/W
Initial value 1(*) 1(*) 1(*) 1(*) 1 1 1 1
P6D is a special function register (SFR) to set the output value of the Port 6 pins. The value of this register is output to
Port 6. The value written to P6D is readable.
(*) For ML610472/ML610Q472, P67D to P64D always returns the value “0”.
For ML610471/ML610Q471, the initial value of P67D to P64D is “1”.
[Description of Bits]
•
P67D to P60D (bit 7 to 0)
The P67D to P60D bits are used to set the output value of the Port 6 pins.
P67D Description
0 Output level of the P67 pin: "L"
1 Output level of the P67 pin: "H"
P66D Description
0 Output level of the P66 pin: "L"
1 Output level of the P66 pin: "H"
P65D Description
0 Output level of the P65 pin: "L"
1 Output level of the P65 pin: "H"
P64D Description
0 Output level of the P64 pin: "L"
1 Output level of the P64 pin: "H"
P63D Description
0 Output level of the P63 pin: "L"
1 Output level of the P63 pin: "H"
P62D Description
0 Output level of the P62 pin: "L"
1 Output level of the P62 pin: "H"
P61D Description
0 Output level of the P61 pin: "L"
1 Output level of the P61 pin: "H"
P60D Description
0 Output level of the P60 pin: "L"
1 Output level of the P60 pin: "H"