
ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 5 Interrupt
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5.3.5 Interrupt Disable State
Even if the interrupt conditions are satisfied, an interrupt may not be accepted depending on the operating state. This is
called an interrupt disabled state. See below for the interrupt disabled state and the handling of interrupts in this state.
Interrupt disabled state 1:Between the interrupt shift cycle and the instruction at the beginning of the interrupt routine
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately following the
execution of the instruction at the beginning of the interrupt routine corresponding to the interrupt that has already
been enabled.
Interrupt disabled state 2:Between the DSR prefix instruction and the next instruction
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately after execution of
the instruction following the DSR prefix instruction.
For the DSR prefix instruction, see “nX-U8/100 Core Instruction Manual”.
Summary of Contents for ML610471
Page 12: ...Chapter 1 Overview...
Page 38: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 48: ...Chapter 4 MCU Control Function...
Page 62: ...Chapter 5 Interrupts...
Page 82: ...Chapter 6 Clock Generation Circuit...
Page 94: ...Chapter 7 Time Base Counter...
Page 105: ...Chapter 8 Capture...
Page 114: ...Chapter 9 Timer...
Page 133: ...Chapter 10 Watchdog Timer...
Page 141: ...Chapter 11 UART...
Page 164: ...Chapter 12 Port 0...
Page 173: ...Chapter 13 Port 2...
Page 180: ...Chapter 14 Port 3...
Page 188: ...Chapter 15 Port 4...
Page 199: ...Chapter 16 Port 6...
Page 205: ...Chapter 17 RC Oscillation Type A D Converter...
Page 225: ...Chapter 18 LCD Drivers...
Page 243: ...Chapter 19 Power Supply Circuit...
Page 245: ...Chapter 20 uEASE Flash Writer System...
Page 249: ...Chapter 21 Software Development...
Page 258: ...Appendixes...
Page 280: ...Revision History...