UPI-41A/41AH/42/42AH USER’S MANUAL
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Figure 5-9. 8080A-UPI Interface
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Figure 5-10. 8048-UPI Interface
UPI’s when data transfer occurs. The UPI’s are pro-
grammed to handle isolated tasks and, since they oper-
ate in parallel, system throughput is increased.
GENERAL HANDSHAKING
PROTOCOL
1) Master reads STATUS register (RD, CS, A
0
e
(0,
0, 1)) in polling or in response to either an IBF or an
OBF interrupt.
2) If the UPI DBBIN register is empty (IBF flag
e
0),
Master writes a word to the DBBIN register (WR,
CS, A
0
e
(0, 0, 1) or (0, 0, 0)). If A
0
e
1, write
command word, set F
1
. If A
0
e
0, write data word,
F
1
e
0.
3) If the UPI DBBOUT register is full (OBF flag
e
1),
Master reads a word from the DBBOUT register
(RD, CS, A
0
e
(0,0, 0)).
4) UPI recognizes IBF (via IBF interrupt or JNIBF).
Input data or command word is processed, depend-
ing on F1; IBF is reset. Repeat step 1 above.
5) UPI recognizes OBF flag
e
0 (via JOBF). Next
word is output to DBBOUT register, OBF is set.
Repeat step 1 above.
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