UPI-41A/41AH/42/42AH USER’S MANUAL
EN I
Enable IBF Interrupt
Opcode:
0 0 0 0
0 1 0 1
The Input Buffer Full interrupt is enabled. A low signal on WR and CS initiates the interrupt
sequence.
EN TCNTI
Enable Timer/Counter Interrupt
Opcode:
0 0 1 0
0 1 0 1
The timer/counter interrupt is enabled. An overflow of this register initiates the interrupt
sequence.
IN A,DBB
Input Data Bus Buffer Contents to Accumulator
Opcode:
0 0 1 0
0 0 1 0
Data in the DBBIN register is transferred to the accumulator and the Input Buffer Full (IBF)
flag is set to zero.
(A)
w
(DBB)
(IBF)
w
0
Example:
INDBB: IN A,DBB
;INPUT DBBIN CONTENTS TO
;ACCUMULATOR
IN A,Pp
Input Port 1 – 2 Data to Accumulator
Opcode:
0 0 0 0
1 0 p
1
p
0
This is a 2-cycle instruction. Data present on port ‘p’ is transferred (read) to the accumulator.
(A)
w
(Pp)
p
e
1 – 2 (see ANL instruction)
Example:
INP 12: IN A,P1
;INPUT PORT 1 CONTENTS
;TO ACC
MOV R6,A
;MOVE ACC CONTENTS TO
;REG 6
IN A,P2
;INPUT PORT 2 CONTENTS
;TO ACC
MOV R7,A
;MOVE ACC CONTENTS TO REG 7
INC A
Increment Accumulator
Opcode:
0 0 0 1
0 1 1 1
The contents of the accumulator are incremented by one.
(A)
w
(A)
a
1
Example:
Increment contents of location 10 in data memory.
INCA: MOV R0,
Ý
10
;MOV ‘10’ DEC TO ADDRESS
;REG 0
MOV A,
@
R0
;MOVE CONTENTS OF LOCATION
;10 TO ACC
INC A
;INCREMENT ACC
MOV
@
R0,A
;MOVE ACC CONTENTS TO
;LOCATION 10
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