Intel Agilex F Series, User Manual

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Schematic Signal Name FPGA Pin Number I/O Standard Description
QSFPDD_REFCLK_N AC49 LVPECL QSFPDD Reference Clock Negative
QSFPDD_LED1 (Yellow LED) G49 1.2V HS LVCMOS QSFPDD Yellow LED
QSFPDD_LED2 (Green LED) F48 1.2V HS LVCMOS QSFPDD Green LED
Note: For more information about Intel’s True Differential Signaling technology, refer to the
Intel Agilex Device Data Sheet.
A.5.3. QSFP Interface
The Intel Agilex FPGA (two F-tiles) development board includes a connector and cages
system for mounting a Quad Small Form-Factor Pluggable (QSFP) module. The
interface connects to four 56 Gbps PAM4 capable F-tile lanes of the Intel Agilex FPGA,
supporting QSFP modules, with capability of 200 Gbps aggregate bandwidth with
power classifications up to 3.5 W.
Table 31. QSFP Pin Assignments
For more information about Intel's True Differential Signaling technology, refer to the Intel Agilex Device Data
Sheet.
Schematic Signal Name FPGA Pin Number I/O Standard Description
QSFP_TX0_P BL49 True Differential Signaling QSFP Transmit Channel 0 Positive
QSFP_TX0_N BM48 True Differential Signaling QSFP Transmit Channel 0 negative
QSFP_TX1_P BB52 True Differential Signaling QSFP Transmit Channel 1 Positive
QSFP_TX1_N BA51 True Differential Signaling QSFP Transmit Channel 1 negative
QSFP_TX2_P BJ51 True Differential Signaling QSFP Transmit Channel 2 Positive
QSFP_TX2_N BK52 True Differential Signaling QSFP Transmit Channel 2 negative
QSFP_TX3_P BE51 True Differential Signaling QSFP Transmit Channel 3 Positive
QSFP_TX3_N BF52 True Differential Signaling QSFP Transmit Channel 3 negative
QSFP_RX0_P BL55 True Differential Signaling QSFP Receive Channel 0 Positive
QSFP_RX0_N BM54 True Differential Signaling QSFP Receive Channel 0 negative
QSFP_RX1_P AW55 True Differential Signaling QSFP Receive Channel 1 Positive
QSFP_RX1_N AY54 True Differential Signaling QSFP Receive Channel 1 negative
QSFP_RX2_P BH54 True Differential Signaling QSFP Receive Channel 2 Positive
QSFP_RX2_N BG55 True Differential Signaling QSFP Receive Channel 2 negative
QSFP_RX3_P BC55 True Differential Signaling QSFP Receive Channel 3 Positive
QSFP_RX3_N BD54 True Differential Signaling QSFP Receive Channel 3 negative
QSFP_REFCLK_P AW49 156.25 MHz LVPECL QSFP Reference Clock
Positive
QSFP_REFCLK_N AV48 156.25 MHz LVPECL QSFP Reference Clock Negative
QSFP_LED1 (Yellow LED) B48 1.2 V HS LVCMOS QSFPDD Yellow LED
QSFP_LED2 (Green LED) A47 1.2 V HS LVCMOS QSFPDD Green LED
A. Development Kit Components
739942 | 2022.09.21
Intel
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F-Series FPGA (Two F-Tiles) Development Kit User Guide
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