Host Bridge/DRAM Controller Registers (D0:F0)
R
Intel
®
82925X/82925XE MCH Datasheet
65
4.1.23
PAM3—Programmable Attribute Map 3 (D0:F0)
PCI Device:
0
Address Offset:
93h
Default Value:
00h
Access: R/W
Size: 8
bits
This register controls the read, write, and shadowing attributes of the BIOS areas from 0D0000h–
0D7FFFh.
Bit Access
&
Default
Description
7:6 Reserved
5:4 R/W
00b
0D4000h–0D7FFFh Attribute (HIENABLE):
This field controls the steering of read
and write cycles that address the BIOS area from 0D4000h to 0D7FFFh.
00 = DRAM Disabled: Accesses are directed to the DMI.
01 = Read Only: All reads are serviced by DRAM. All writes are forwarded to the
DMI.
10 = Write Only: All writes are sent to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
3:2 Reserved
1:0 R/W
00b
0D0000h–0D3FFFh Attribute (LOENABLE):
This field controls the steering of read
and write cycles that address the BIOS area from 0D0000h to 0D3FFFh.
00 = DRAM Disabled: Accesses are directed to the DMI.
01 = Read Only: All reads are serviced by DRAM. All writes are forwarded to the
DMI.
10 = Write Only: All writes are sent to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
Summary of Contents for 82925X
Page 78: ...Host Bridge DRAM Controller Registers D0 F0 R 78 Intel 82925X 82925XE MCH Datasheet...
Page 98: ...EPBAR Registers Egress Port Register Summary R 98 Intel 82925X 82925XE MCH Datasheet...
Page 108: ...DMIBAR Registers Direct Media Interface DMI RCRB R 108 Intel 82925X 82925XE MCH Datasheet...
Page 156: ...Host PCI Express Graphics Bridge Registers D1 F0 R 156 Intel 82925X 82925XE MCH Datasheet...
Page 172: ...System Address Map R 172 Intel 82925X 82925XE MCH Datasheet...
Page 192: ...Electrical Characteristics R 192 Intel 82925X 82925XE MCH Datasheet...
