Intel 82925X, Datasheet

Page: 191 / 242

Electrical Characteristics
R
Intel
®
82925X/82925XE MCH Datasheet 191
Symbol
Signal
Group
Parameter Min Nom Max Unit Notes
3
V
CROSS
(o) Crossing Voltage 0.45 x
(V
IH
– V
IL
)
0.5 x
(V
IH
– V
IL
)
0.55 x
(V
IH
– V
IL
)
V
V
OL
(p) Output Low Voltage
(CMOS Outputs) — — 0.4 V
V
OH
(p) Output High Voltage
(CMOS Outputs) 2.1 — — V
I
OL
(p) Output Low Current
(CMOS Outputs) — — 1 mA @V
OL_HI
max
I
OH
(p) Output High Current
(CMOS Outputs) –1 — — mA @V
OH_HI
min
V
IL
(p) Input Low Voltage — — 1.1 V
V
IH
(p) Input High Voltage 1.4 V
I
LEAK
(p) Crossing Voltage — —
±
10
µ
A
C
IN
(p) Input Capacitance 3.0 — 6.0 pF
V
IL
(n1) Input Low Voltage — — 0.8 V
V
IH
(n1) Input High Voltage 2.0 — — V
I
LEAK
(n1) Crossing Voltage — —
±
100
µ
A 0 < V
in
< VCC3_3
C
IN
(n1) Input Capacitance 4.690 — 5.370 pF
NOTES:
1. Determined with 2x MCH DDR2 Buffer Strength Settings into a 50
Ω
to 0.5xV
CCSM
(DDR2) test load.
2. Specified at the measurement point into a timing and voltage compliance test load as shown in
Transmitter compliance eye diagram of the PCI Express Interface Specification 1.0a and measured over
any 250 consecutive TX Uls.
3. Specified at the measurement point and measured over any 250 consecutive Uls. The test load shown
in Receiver compliance eye diagram of the PCI Express Interface Specification 1.0a should be used as
the RX device when taking measurements.
§