Functional
Description
R
Intel
®
82925X/82925XE MCH Datasheet
175
Figure 10-1. System Memory Styles
Sys_Mem_Styles
Single Channel
CL
CL
CL
Dual Channel Interleaved
(channels do not have to
match)
Dual Channel Asymmetric
(channels do not have to
match)
CH B
CH A
CH B
CH A
CH B
CH A
0
0
Scheme
XOR Bit 6 => CL
CH A or CH B
CH B
CH A
TOM
TOM
CH B0
CH A
TOM
CH A0
CH B
TOM
Table 10-1. Sample System Memory Organization with Interleaved Channels
Rank Channel
A
population
Cumulative
top address in
Channel A
Channel B
population
Cumulative
top address in
Channel B
3
0 MB
2560 MB
0 MB
2560 MB
2
256 MB
2560 MB
256 MB
2560 MB
1
512 MB
2048 MB
512 MB
2048 MB
0
512 MB
1024 MB
512 MB
1024 MB
Table 10-2. Sample System Memory Organization with Asymmetric Channels
Rank Channel
A
population
Cumulative
top address in
Channel A
Channel B
population
Cumulative
top address in
Channel B
3
0 MB
1280 MB
0 MB
2560 MB
2
256 MB
1280 MB
256 MB
2560 MB
1
512 MB
1024 MB
512 MB
2304 MB
0
512 MB
512 MB
512 MB
1792 MB
Summary of Contents for 82925X
Page 78: ...Host Bridge DRAM Controller Registers D0 F0 R 78 Intel 82925X 82925XE MCH Datasheet...
Page 98: ...EPBAR Registers Egress Port Register Summary R 98 Intel 82925X 82925XE MCH Datasheet...
Page 108: ...DMIBAR Registers Direct Media Interface DMI RCRB R 108 Intel 82925X 82925XE MCH Datasheet...
Page 156: ...Host PCI Express Graphics Bridge Registers D1 F0 R 156 Intel 82925X 82925XE MCH Datasheet...
Page 172: ...System Address Map R 172 Intel 82925X 82925XE MCH Datasheet...
Page 192: ...Electrical Characteristics R 192 Intel 82925X 82925XE MCH Datasheet...