IDT 89HPES16NT2, User Manual

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IDT SMBus Interfaces
PES16NT2 User Manual 6 - 9 April 15, 2008
Notes
Initialization
Slave SMBus initialization occurs during a fundamental reset (see section Fundamental Reset on page
2-7). During the fundamental reset initialization sequence, the address is specified by the
SSMBADDR[5,3:1] signals as shown in Table 6.7.
SMBus Transactions
The slave SMBus interface responds to the following SMBus transactions initiated by an SMBus master.
See the SMBus 2.0 specification for a detailed description of these transactions.
– Byte and Word Write/Read
– Block Write/Read
Initiation of any SMBus transaction other than those listed above to the slave SMBus interface produces
undefined results. Associated with each of the above transactions is a command code. The command code
format for operations supported by the slave SMBus interface is shown in Figure 6.5 and described in Table
6.8.
Figure 6.5 Slave SMBus Command Code Format
Address
Bit
Address Bit Value
1 SSMBADDR[1]
2 SSMBADDR[2]
3 SSMBADDR[3]
4 0
5 SSMBADDR[5]
6 1
7 1
Table 6.7 Slave SMBus Address When a Static Address is Selected.
Bit
6
Bit
7
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
END START FUNCTION SIZE PEC