IDT Non-Transparent Mode Operation
PES16NT2 User Manual
10 - 99
April 15, 2008
Notes
5:3
PALINKDN
RW
0x0
Port A Link Down Configuration.
This field encodes the
action taken when the PALINKDN bit in the INTSTS regis-
ter is set, or cleared when INTx interrupt signalling is
enabled.
Regardless of the value of this field, an MSI is only sent
when the Enable (EN) bit is set in the MSICAP register.
Similarly, and INTx message is only sent if not disabled by
the INTXD bit in the PCICMD register.
The action (i.e., this field) should not be modified while the
corresponding bit is set. Modifying the action when the cor-
responding bit is set produces undefined results.
0x0 -(disabled) interrupt is masked/disabled.
0x1 -(msi) send a Message Signalled Interrupt (MSI) as
specified by the MSI capability structure.
0x2 -(int_a) generate INTA assertion and negation mes-
sages.
0x3 -(int_b) generate INTB assertion and negation mes-
sages.
0x4 -(int_c) generate INTC assertion and negation mes-
sages.
0x5 -(int_d) generate INTD assertion and negation mes-
sages.
0x6 though 0x8 -(reserved) reserved.
8:6
PBLINKUP
RW
0x0
Port B Link Up Configuration.
This field encodes the
action taken when the PBLINKUP bit in the INTSTS regis-
ter is set, or cleared when INTx interrupt signalling is
enabled.
Regardless of the value of this field, an MSI is only sent
when the Enable (EN) bit is set in the MSICAP register.
Similarly, and INTx message is only sent if not disabled by
the INTXD bit in the PCICMD register.
The action (i.e., this field) should not be modified while the
corresponding bit is set. Modifying the action when the cor-
responding bit is set produces undefined results.
0x0 -(disabled) interrupt is masked/disabled.
0x1 -(msi) send a Message Signalled Interrupt (MSI) as
specified by the MSI capability structure.
0x2 -(int_a) generate INTA assertion and negation mes-
sages.
0x3 -(int_b) generate INTB assertion and negation mes-
sages.
0x4 -(int_c) generate INTC assertion and negation mes-
sages.
0x5 -(int_d) generate INTD assertion and negation mes-
sages.
0x6 though 0x8 -(reserved) reserved.
Bit
Field
Field
Name
Type
Default
Value
Description
Summary of Contents for 89HPES16NT2
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Page 20: ...IDT Register List PES16NT2 User Manual xiv April 15 2008 Notes...
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Page 130: ...IDT Transparent Mode Operation PES16NT2 User Manual 9 44 April 15 2008 Notes...
Page 284: ...IDT Non Transparent Mode Operation PES16NT2 User Manual 10 154 April 15 2008 Notes...