© Copyright IBM Corp. 2016. All rights reserved.
xv
Figures
2-1 z13s frame: Rear and front view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2-2 z13s (one CPC drawer) I/O drawer configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2-3 z13s (two CPC Drawers) I/O Drawer Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2-4 Model N10 components (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2-5 Model N20 components (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2-6 CPC drawer (front view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2-7 CPC drawer logical structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2-8 Drawer to drawer communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2-9 Oscillators cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2-10 Conceptual overview of system control elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
2-11 Redundant DCAs and blowers for CPC drawers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2-12 Single chip modules (PU SCM and SC SCM) N20 CPC Drawer . . . . . . . . . . . . . . . . 47
2-13 PU Chip Floorplan. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
2-14 PU Core floorplan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
2-15 SC chip diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2-16 Cache level structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
2-17 CPC drawer memory topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2-18 RAIM configuration per node . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2-19 Model N10 memory plug locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2-20 Model N20 one drawer memory plug locations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
2-21 Model N20 two drawer memory plug locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
2-22 Memory allocation diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
2-23 Model N10 drawer: Location of the PCIe and IFB fanouts . . . . . . . . . . . . . . . . . . . . . 66
2-24 Model N20 two CPC drawer: Locations of the PCIe and IFB fanouts. . . . . . . . . . . . . 66
2-25 Redundant I/O interconnect for I/O drawer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
2-26 Redundant I/O interconnect for PCIe I/O drawer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
2-27 z13s upgrade paths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
3-1 z13s cache levels and memory hierarchy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
3-2 z13s cache topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
3-3 z13s and zBC12 cache level comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
3-4 z13s CPC drawer communication topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
3-5 Point-to-point topology z13s two CPC drawers communication . . . . . . . . . . . . . . . . . . 88
3-6 Two threads running simultaneously on the same processor core . . . . . . . . . . . . . . . . 90
3-7 Schematic representation of add SIMD instruction with 16 elements in each vector . . 91
3-8 Floating point registers overlaid by vector registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
3-9 z13s PU core logical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
3-10 z13s in-order and out-of-order core execution improvements . . . . . . . . . . . . . . . . . . 94
3-11 Compression and cryptography accelerators on a core in the chip . . . . . . . . . . . . . . 96
3-12 PU error detection and recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
3-13 ICF options: Shared ICFs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
3-14 Logical flow of Java code execution on a zIIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
3-15 IRD LPAR cluster example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
3-16 Sysplex hardware overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
3-17 Dynamic CF dispatching (shared CPs or shared ICF PUs) . . . . . . . . . . . . . . . . . . . 134
4-1 I/O drawer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
4-2 I/O domains of an I/O drawer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
4-3 PCIe I/O drawer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
4-4 z13s (N20) connectivity to PCIe I/O drawers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Summary of Contents for z13s
Page 2: ......
Page 3: ...International Technical Support Organization IBM z13s Technical Guide June 2016 SG24 8294 00 ...
Page 24: ...THIS PAGE INTENTIONALLY LEFT BLANK ...
Page 164: ...136 IBM z13s Technical Guide ...
Page 226: ...198 IBM z13s Technical Guide ...
Page 256: ...228 IBM z13s Technical Guide ...
Page 414: ...386 IBM z13s Technical Guide ...
Page 464: ...436 IBM z13s Technical Guide ...
Page 476: ...448 IBM z13s Technical Guide ...
Page 498: ...470 IBM z13s Technical Guide ...
Page 502: ...474 IBM z13s Technical Guide ...
Page 568: ...540 IBM z13s Technical Guide ...
Page 578: ...550 IBM z13s Technical Guide ...
Page 584: ...556 IBM z13s Technical Guide ...
Page 585: ...ISBN 0738441678 SG24 8294 00 1 0 spine 0 875 1 498 460 788 pages IBM z13s Technical Guide ...
Page 586: ......
Page 587: ......
Page 588: ...ibm com redbooks Printed in U S A Back cover ISBN 0738441678 SG24 8294 00 ...