Rev. 1.10
126
November 04, 2019
Rev. 1.10
127
November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
UART transmitter and receiver are functionally independent, they both use the same data format and
baud rate. In all cases stop bits will be used for data transmission.
Enabling/Disabling the UART Interface
The basic on/off function of the internal UART function is controlled using the UREN bit in the
UUCR1 register. When the UART mode is selected by setting the UMD bit in the SIMC0 register to
“1”, if the UREN, UTXEN and URXEN bits are set, then these two UART pins will act as normal
TX output pin and RX input pin respectively. If no data is being transmitted on the TX pin, then it
will default to a logic high value.
Clearing the UREN bit will disable the TX and RX pins and allow these two pins to be used as
normal I/O or other pin-shared functional pins by configuring the corresponding pin-shared control
bits. When the UART function is disabled the buffer will be reset to an empty condition, at the
same time discarding any remaining residual data. Disabling the UART will also reset the error and
status flags with bits UTXEN, URXEN, UTXBRK, URXIF, UOERR, UFERR, UPERR and UNF
being cleared while bits UTIDLE, UTXIF and URIDLE will be set. The remaining control bits in
the UUCR1, UUCR2 and UBRG registers will remain unaffected. If the UREN bit in the UUCR1
register is cleared while the UART is active, then all pending transmissions and receptions will be
immediately suspended and the UART will be reset to a condition as defined above. If the UART is
then subsequently re-enabled, it will restart again in the same configuration.
Data, Parity and Stop Bit Selection
The format of the data to be transferred is composed of various factors such as data bit length, parity
on/off, parity type, address bits and the number of stop bits. These factors are determined by the
setup of various bits within the UUCR1 register. The UBNO bit controls the number of data bits
which can be set to either 8 or 9, the UPRT bit controls the choice of odd or even parity, the UPREN
bit controls the parity on/off function and the USTOPS bit decides whether one or two stop bits are
to be used. The following table shows various formats for data transmission. The address bit, which
is the MSB of the data byte, identifies the frame as an address character or data if the address detect
function is enabled. The number of stop bits, which can be either one or two, is independent of the
data length and is only used for the transmitter. There is only one stop bit for the receiver.
Start Bit
Data Bits
Address Bit
Parity Bit
Stop Bit
Example of 8-bit Data Formats
1
8
0
0
1
1
7
0
1
1
1
7
1
0
1
Example of 9-bit Data Formats
1
9
0
0
1
1
8
0
1
1
1
8
1
0
1
Transmitter Receiver Data Format
The following diagram shows the transmit and receive waveforms for both 8-bit and 9-bit data formats.
Bit 0
8-bit data format
Bit 1
Stop
Bit
Next
Start
Bit
Start
Bit
Parity Bit
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 0
9-bit data format
Bit 1
Start
Bit
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Stop
Bit
Next
Start
Bit
Parity Bit
Bit 8
Bit 7
