Rev. 1.10
130
November 04, 2019
Rev. 1.10
131
November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Noise Error – UNF
Over-sampling is used for data recovery to identify valid incoming data and noise. If noise is
detected within a frame the following will occur:
•
The read only noise flag, UNF, in the UUSR register will be set on the rising edge of the URXIF bit.
•
Data will be transferred from the Shift register to the UTXR_RXR register.
•
No interrupt will be generated. However this bit rises at the same time as the URXIF bit which
itself generates an interrupt.
Note that the UNF flag is reset by a UUSR register read operation followed by a UTXR_RXR
register read operation.
Framing Error – UFERR
The read only framing error flag, UFERR, in the UUSR register, is set if a zero is detected instead of
stop bits. If two stop bits are selected, both stop bits must be high; otherwise the UFERR flag will be
set. The UFERR flag and the received data will be recorded in the UUSR and UTXR_RXR registers
respectively, and the flag is cleared in any reset.
Parity Error – UPERR
The read only parity error flag, UPERR, in the UUSR register, is set if the parity of the received
word is incorrect. This error flag is only applicable if the parity is enabled, UPREN = 1, and if
the parity type, odd or even is selected. The read only UPERR flag and the received data will be
recorded in the UUSR and UTXR_RXR registers respectively. It is cleared on any reset, it should
be noted that the flags, UFERR and UPERR, in the UUSR register should first be read by the
application program before reading the data word.
UART Interrupt Structure
Several individual UART conditions can trigger an USIM interrupt. When these conditions exist,
a low pulse will be generated to get the attention of the microcontroller. These conditions are a
transmitter data register empty, transmitter idle, receiver data available, receiver overrun, address
detect and an RX pin wake-up. When any of these conditions are created, if the global interrupt
enable bit and the USIM interrupt control bit are enabled and the stack is not full, the program will
jump to its corresponding interrupt vector where it can be serviced before returning to the main
program. Four of these conditions have the corresponding UUSR register flags which will generate
an USIM interrupt if its associated interrupt enable control bit in the UUCR2 register is set. The
two transmitter interrupt conditions have their own corresponding enable control bits, while the two
receiver interrupt conditions have a shared enable control bit. These enable bits can be used to mask
out individual USIM UART mode interrupt sources.
The address detect condition, which is also an USIM UART mode interrupt source, does not have an
associated flag, but will generate an USIM interrupt when an address detect condition occurs if its
function is enabled by setting the UADDEN bit in the UUCR2 register. An RX pin wake-up, which
is also an USIM UART mode interrupt source, does not have an associated flag, but will generate an
USIM interrupt if the UART clock (f
H
) source is switched off and the UWAKE and URIE bits in the
UUCR2 register are set when a falling edge on the RX pin occurs. Note that in the event of an RX
wake-up interrupt occurring, there will be a certain period of delay, commonly known as the System
Start-up Time, for the oscillator to restart and stabilize before the system resumes normal operation.
Note that the UUSR register flags are read only and cannot be cleared or set by the application
program, neither will they be cleared when the program jumps to the corresponding interrupt
servicing routine, as is the case for some of the other interrupts. The flags will be cleared
automatically when certain actions are taken by the UART, the details of which are given in the
