Rev. 1.10
120
November 04, 2019
Rev. 1.10
121
November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Bit 2
URXIF
: Receive UTXR_RXR data register status
0: UTXR_RXR data register is empty
1: UTXR_RXR data register has available data
The URXIF flag is the receive data register status flag. When this read only flag is
“0”, it indicates that the UTXR_RXR read data register is empty. When the flag is
“1”, it indicates that the UTXR_RXR read data register contains new data. When the
contents of the shift register are transferred to the UTXR_RXR register, an interrupt
is generated if URIE=1 in the UUCR2 register. If one or more errors are detected in
the received word, the appropriate receive-related flags UNF, UFERR, and/or UPERR
are set within the same clock cycle. The URXIF flag will eventually be cleared when
the UUSR register is read with URXIF set, followed by a read from the UTXR_RXR
register, and if the UTXR_RXR register has no more new data available.
Bit 1
UTIDLE
: Transmission idle
0: Data transmission is in progress (Data being transmitted)
1: No data transmission is in progress (Transmitter is idle)
The UTIDLE flag is known as the transmission complete flag. When this read only
flag is “0”, it indicates that a transmission is in progress. This flag will be set high
when the UTXIF flag is “1” and when there is no transmit data or break character
being transmitted. When UTIDLE is equal to “1”, the TX pin becomes idle with the
pin state in logic high condition. The UTIDLE flag is cleared by reading the UUSR
register with UTIDLE set and then writing to the UTXR_RXR register. The flag is not
generated when a data character or a break is queued and ready to be sent.
Bit 0
UTXIF
: Transmit UTXR_RXR data register status
0: Character is not transferred to the transmit shift register
1: Character has transferred to the transmit shift register (UTXR_RXR data register
is empty)
The UTXIF flag is the transmit data register empty flag. When this read only flag is “0”,
it indicates that the character is not transferred to the transmitter shift register. When
the flag is “1”, it indicates that the transmitter shift register has received a character
from the UTXR_RXR data register. The UTXIF flag is cleared by reading the UART
status register (UUSR) with UTXIF set and then writing to the UTXR_RXR data
register. Note that when the UTXEN bit is set, the UTXIF flag bit will also be set since
the transmit data register is not yet full.
• UUCR1 Register
The UUCR1 register together with the UUCR2 register are the two UART control registers that are
used to set the various options for the UART function, such as overall on/off control, parity control,
data transfer bit length etc. Further explanation on each of the bits is given below:
Bit
7
6
5
4
3
2
1
0
Name
UREN
UBNO
UPREN
UPRT
USTOPS UTXBRK
URX8
UTX8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
W
POR
0
0
0
0
0
0
x
0
“x”: unknown
Bit 7
UREN
: UART function enable control
0: Disable UART. TX and RX pins are in a floating state
1: Enable UART. TX and RX pins function as UART pins
The UREN bit is the UART enable bit. When this bit is equal to “0”, the UART will be
disabled and the RX pin as well as the TX pin will be set in a floating state. When the
bit is equal to “1”, the UART will be enabled if the UMD bit is set and the TX and RX
pins will function as defined by the UTXEN and URXEN enable control bits.
