Holtek HT45F5Q-3, Manual

Page: 64 / 163

Rev. 1.10 64 November 04, 2019 Rev. 1.10 65 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Register
Name
Bit
7 6 5 4 3 2 1 0
CTMC0 CTPAU CTCK2 CTCK1 CTCK0 CTON CTRP2 CTRP1 CTRP0
CTMC1 CTM1 CTM0 CTIO1 CTIO0 CTOC CTPOL CTDPX CTCCLR
CTMDL D7 D6 D5 D4 D3 D2 D1 D0
CTMDH — — — — — — D9 D8
CTMAL D7 D6 D5 D4 D3 D2 D1 D0
CTMAH — — — — — — D9 D8
1 0 -bit Compact Type TM Register List
• CTMC0 Register
Bit 7 6 5 4 3 2 1 0
Name CTPAU CTCK2 CTCK1 CTCK0 CTON CTRP2 CTRP1 CTRP0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit 7 CTPAU : CTM Counter Pause control
0: Run
1: Pause
The counter can be paused by setting this bit high. Clearing the bit to zero restores
normal counter operation. When in a Pause condition the CTM will remain powered
up and continue to consume power. The counter will retain its residual value when
this bit changes from low to high and resume counting from this value when the bit
changes to a low value again.
Bit 6~4 CTCK2~CTCK0 : Select CTM Counter clock
000: f
SYS
/4
001: f
SYS
010: f
H
/16
011: f
H
/64
100: f
SUB
101: f
SUB
110: CTCK rising edge clock
111: CTCK falling edge clock
These three bits are used to select the clock source for the CTM. The external pin
clock source can be chosen to be active on the rising or falling edge. The clock source
f
SYS
is the system clock, while f
H
and f
SUB
are other internal clocks, the details of which
can be found in the oscillator section.
Bit 3 CTON : CTM Counter On/Off control
0: Off
1: On
This bit controls the overall on/off function of the CTM. Setting the bit high enables
the counter to run while clearing the bit disables the CTM. Clearing this bit to zero
will stop the counter from counting and turn off the CTM which will reduce its power
consumption. When the bit changes state from low to high the internal counter value
will be reset to zero, however when the bit changes from high to low, the internal
counter will retain its residual value until the bit returns high again. If the CTM is in
the Compare Match Output Mode or the PWM Output Mode then the CTM output pin
will be reset to its initial condition, as specified by the CTOC bit, when the CTON bit
changes from low to high.